On Tue, 15 May 2018, Huang, Ying wrote: > From: Huang Ying <ying.huang@xxxxxxxxx> > > This is to take better advantage of huge page clearing > optimization (c79b57e462b5d, "mm: hugetlb: clear target sub-page last > when clearing huge page"). Which will clear to access sub-page last > to avoid the cache lines of to access sub-page to be evicted when > clearing other sub-pages. This needs to get the address of the > sub-page to access, that is, the fault address inside of the huge > page. So the hugetlb no page fault handler is changed to pass that > information. This will benefit workloads which don't access the begin > of the huge page after page fault. > > With this patch, the throughput increases ~28.1% in vm-scalability > anon-w-seq test case with 88 processes on a 2 socket Xeon E5 2699 v4 > system (44 cores, 88 threads). The test case creates 88 processes, > each process mmap a big anonymous memory area and writes to it from > the end to the begin. For each process, other processes could be seen > as other workload which generates heavy cache pressure. At the same > time, the cache miss rate reduced from ~36.3% to ~25.6%, the > IPC (instruction per cycle) increased from 0.3 to 0.37, and the time > spent in user space is reduced ~19.3% > > Signed-off-by: "Huang, Ying" <ying.huang@xxxxxxxxx> > Cc: Andrea Arcangeli <aarcange@xxxxxxxxxx> > Cc: "Kirill A. Shutemov" <kirill.shutemov@xxxxxxxxxxxxxxx> > Cc: Andi Kleen <andi.kleen@xxxxxxxxx> > Cc: Jan Kara <jack@xxxxxxx> > Cc: Michal Hocko <mhocko@xxxxxxxx> > Cc: Matthew Wilcox <mawilcox@xxxxxxxxxxxxx> > Cc: Hugh Dickins <hughd@xxxxxxxxxx> > Cc: Minchan Kim <minchan@xxxxxxxxxx> > Cc: Shaohua Li <shli@xxxxxx> > Cc: Christopher Lameter <cl@xxxxxxxxx> > Cc: "Aneesh Kumar K.V" <aneesh.kumar@xxxxxxxxxxxxxxxxxx> > Cc: Punit Agrawal <punit.agrawal@xxxxxxx> > Cc: Anshuman Khandual <khandual@xxxxxxxxxxxxxxxxxx> Acked-by: David Rientjes <rientjes@xxxxxxxxxx>
