On Mon, Mar 05, 2018 at 04:17:45AM -0800, Linus Torvalds wrote: > Restoring the segments can cause exceptions that need to be > handled. With PTI enabled, we still need to be on kernel cr3 > when the exception happens. For the cr3-switch we need > at least one integer scratch register, so we can't switch > with the user integer registers already loaded. > > > This fundamentally seems wrong. Okay, right, with v3 it is wrong, in v2 I still thought I could get away without remembering the entry-cr3, but didn't think about the #DB case then. In v3 I added code which remembers the entry-cr3 and handles the entry-from-kernel-mode-with-user-cr3 case for all exceptions including #DB. > The things is, we *know* that we will restore two segment registers with the > user cr3 already loaded: CS and SS get restored with the final iret. Yeah, I know, but the iret-exception path is fine because it will deliver a SIGILL and doesn't return to the faulting iret. Anyway, I will remove these restore-reorderings, they are not needed anymore. > So has this been tested with > > - single-stepping through sysenter > > This takes a DB fault in the first kernel instruction. We're in kernel mode, > but with user cr3. > > - ptracing and setting CS/SS to something bad > > That should test the "exception on iret" case - again in kernel mode, but > with user cr3 restored for the return. The iret-exception case is tested by the ldt_gdt selftest (the do_multicpu_tests subtest). But I didn't actually tested single-stepping through sysenter yet. I just re-ran the same tests I did with v2 on this patch-set. Regards, Joerg -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>
