From: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx> Our CR4-based TLB flush currently requries global pages to be supported *and* enabled. But, the hardware only needs for them to be supported. Make the code more robust by alllowing the initial state of X86_CR4_PGE to be on *or* off. In addition, if we get called in an unepected state (X86_CR4_PGE=0), issue a warning. Having X86_CR4_PGE=0 is certainly unexpected and we should not ignore it if encountered. This essentially gives us the best of both worlds: we get a TLB flush no matter what, and we get a warning if we got called in an unexpected way (X86_CR4_PGE=0). The XOR change was suggested by Kirill Shutemov. Signed-off-by: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx> Cc: Moritz Lipp <moritz.lipp@xxxxxxxxxxxxxx> Cc: Daniel Gruss <daniel.gruss@xxxxxxxxxxxxxx> Cc: Michael Schwarz <michael.schwarz@xxxxxxxxxxxxxx> Cc: Richard Fellner <richard.fellner@xxxxxxxxxxxxxxxxx> Cc: Andy Lutomirski <luto@xxxxxxxxxx> Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx> Cc: Kees Cook <keescook@xxxxxxxxxx> Cc: Hugh Dickins <hughd@xxxxxxxxxx> Cc: x86@xxxxxxxxxx --- b/arch/x86/include/asm/tlbflush.h | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff -puN arch/x86/include/asm/tlbflush.h~kaiser-prep-make-cr4-writes-tolerate-clear-pge arch/x86/include/asm/tlbflush.h --- a/arch/x86/include/asm/tlbflush.h~kaiser-prep-make-cr4-writes-tolerate-clear-pge 2017-11-08 10:45:26.461681402 -0800 +++ b/arch/x86/include/asm/tlbflush.h 2017-11-08 10:45:26.464681402 -0800 @@ -250,9 +250,20 @@ static inline void __native_flush_tlb_gl unsigned long cr4; cr4 = this_cpu_read(cpu_tlbstate.cr4); - /* clear PGE */ - native_write_cr4(cr4 & ~X86_CR4_PGE); - /* write old PGE again and flush TLBs */ + /* + * This function is only called on systems that support X86_CR4_PGE + * and where always set X86_CR4_PGE. Warn if we are called without + * PGE set. + */ + WARN_ON_ONCE(!(cr4 & X86_CR4_PGE)); + /* + * Architecturally, any _change_ to X86_CR4_PGE will fully flush the + * TLB of all entries including all entries in all PCIDs and all + * global pages. Make sure that we _change_ the bit, regardless of + * whether we had X86_CR4_PGE set in the first place. + */ + native_write_cr4(cr4 ^ X86_CR4_PGE); + /* Put original CR4 value back: */ native_write_cr4(cr4); } _ -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>
