On Wed, Jul 12, 2017 at 11:07 PM, Mel Gorman <mgorman@xxxxxxx> wrote:
> --- a/arch/x86/mm/tlb.c
> +++ b/arch/x86/mm/tlb.c
> @@ -455,6 +455,39 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
> put_cpu();
> }
>
> +/*
> + * Ensure that any arch_tlbbatch_add_mm calls on this mm are up to date when
s/are up to date/have flushed the TLBs/ perhaps?
Can you update this comment in arch/x86/include/asm/tlbflush.h:
* - Fully flush a single mm. .mm will be set, .end will be
* TLB_FLUSH_ALL, and .new_tlb_gen will be the tlb_gen to
* which the IPI sender is trying to catch us up.
by adding something like: This can also happen due to
arch_tlbflush_flush_one_mm(), in which case it's quite likely that
most or all CPUs are already up to date.
Thanks,
Andy
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