On 19 May 2017, at 11:55, Dave Hansen wrote:
> On 04/20/2017 01:47 PM, Zi Yan wrote:
>> pmd_present() checks _PAGE_PSE along with _PAGE_PRESENT to avoid
>> false negative return when it races with thp spilt
>> (during which _PAGE_PRESENT is temporary cleared.) I don't think that
>> dropping _PAGE_PSE check in pmd_present() works well because it can
>> hurt optimization of tlb handling in thp split.
>> In the current kernel, bits 1-4 are not used in non-present format
>> since commit 00839ee3b299 ("x86/mm: Move swap offset/type up in PTE to
>> work around erratum"). So let's move _PAGE_SWP_SOFT_DIRTY to bit 1.
>> Bit 7 is used as reserved (always clear), so please don't use it for
>> other purpose.
>
> This description lacks a problem statement. What's the problem?
>
> _PAGE_PSE is used to distinguish between a truly non-present
> (_PAGE_PRESENT=0) PMD, and a PMD which is undergoing a THP
> split and should be treated as present.
>
> But _PAGE_SWP_SOFT_DIRTY currently uses the _PAGE_PSE bit,
> which would cause confusion between one of those PMDs
> undergoing a THP split, and a soft-dirty PMD.
>
> Thus, we need to move the bit.
>
> Does that capture it?
Yes. I will add this in the next version.
>
>> Signed-off-by: Naoya Horiguchi <n-horiguchi@xxxxxxxxxxxxx>
>> Signed-off-by: Zi Yan <zi.yan@xxxxxxxxxxxxxx>
>> ---
>> arch/x86/include/asm/pgtable_64.h | 12 +++++++++---
>> arch/x86/include/asm/pgtable_types.h | 10 +++++-----
>> 2 files changed, 14 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
>> index 73c7ccc38912..770b5ae271ed 100644
>> --- a/arch/x86/include/asm/pgtable_64.h
>> +++ b/arch/x86/include/asm/pgtable_64.h
>> @@ -157,15 +157,21 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
>> /*
>> * Encode and de-code a swap entry
>> *
>> - * | ... | 11| 10| 9|8|7|6|5| 4| 3|2|1|0| <- bit number
>> - * | ... |SW3|SW2|SW1|G|L|D|A|CD|WT|U|W|P| <- bit names
>> - * | OFFSET (14->63) | TYPE (9-13) |0|X|X|X| X| X|X|X|0| <- swp entry
>> + * | ... | 11| 10| 9|8|7|6|5| 4| 3|2| 1|0| <- bit number
>> + * | ... |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names
>> + * | OFFSET (14->63) | TYPE (9-13) |0|0|X|X| X| X|X|SD|0| <- swp entry
>
> So, this diagram was incomplete before? It should have had "SD" under
> bit 7 for swap entries?
Right. SD bit is used only when CONFIG_MEM_SOFT_DIRTY is enabled, but it is good
to mark it in the diagram to avoid conflicts.
>
>> * G (8) is aliased and used as a PROT_NONE indicator for
>> * !present ptes. We need to start storing swap entries above
>> * there. We also need to avoid using A and D because of an
>> * erratum where they can be incorrectly set by hardware on
>> * non-present PTEs.
>> + *
>> + * SD (1) in swp entry is used to store soft dirty bit, which helps us
>> + * remember soft dirty over page migration
>> + *
>> + * Bit 7 in swp entry should be 0 because pmd_present checks not only P,
>> + * but also L and G.
>> */
--
Best Regards
Yan Zi
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