Dave Hansen <dave@xxxxxxxx> writes:
> #ifdef CONFIG_HUGETLB_PAGE
> +/*
> + * Most architectures have a 1:1 mapping of PTEs to hugetlb page
> + * sizes, but there are some outliers like arm64 that use
> + * multiple hardware PTEs to make a hugetlb "page". Do not
> + * assume that all 'hpage_size's are not exactly at a page table
> + * size boundary. Instead, accept arbitrary 'hpage_size's and
> + * assume they are made up of the next-smallest size. We do not
> + * handle PGD-sized hpages and hugetlb_add_hstate() will WARN()
> + * if it sees one.
> + *
> + * Note also that the page walker code only calls us once per
> + * huge 'struct page', *not* once per PTE in the page tables.
> + */
> +static void smaps_hugetlb_present_hpage(struct mem_size_stats *mss,
> + unsigned long hpage_size)
> +{
> + if (hpage_size >= PUD_SIZE)
> + mss->rss_pud += hpage_size;
> + else if (hpage_size >= PMD_SIZE)
> + mss->rss_pmd += hpage_size;
> + else
> + mss->rss_pte += hpage_size;
> +}
some powerpc platforms have multiple page table entries mapping the same
hugepage and on other, we have a page table entry pointing to something
called hugepaeg directory mapping a set of hugepage. So I am not sure
the above will work for all those ?
Also do we derive pte@<size value> correctly there ?
-aneesh
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