On Tue, 27 Sep 2016 18:52:21 +0200 Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote: > On Wed, Sep 28, 2016 at 12:53:18AM +1000, Nicholas Piggin wrote: > > The more interesting is the ability to avoid the barrier between fastpath > > clearing a bit and testing for waiters. > > > > unlock(): lock() (slowpath): > > clear_bit(PG_locked) set_bit(PG_waiter) > > test_bit(PG_waiter) test_bit(PG_locked) > > > > If this was memory ops to different words, it would require smp_mb each > > side.. Being the same word, can we avoid them? > > Ah, that is the reason I put that smp_mb__after_atomic() there. You have > a cute point on them being to the same word though. Need to think about > that. This is all assuming the store accesses are ordered, which you should get if the stores to the different bits operate on the same address and size. That might not be the case for some architectures, but they might not require barriers for other reasons. That would call for an smp_mb variant that is used for bitops on different bits but same aligned long. Thanks, Nick -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>