[jirislaby-stable:stable-3.12-queue 2253/5330] arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f0,528($4)'

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Hi,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/jirislaby/linux-stable.git stable-3.12-queue
head:   948c2b1f570cbf441db7f0fad28f7dcb5b54443d
commit: 478a5f81defe61a89083f3b719e142f250427098 [2253/5330] kernel: add support for gcc 5
config: mips-allnoconfig (attached as .config)
compiler: mips-linux-gnu-gcc (Debian 5.3.1-8) 5.3.1 20160205
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout 478a5f81defe61a89083f3b719e142f250427098
        # save the attached .config to linux build tree
        make.cross ARCH=mips 

All errors (new ones prefixed by >>):

   arch/mips/kernel/r4k_switch.S: Assembler messages:
>> arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f0,528($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f2,544($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f4,560($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f6,576($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f8,592($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f10,608($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f12,624($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f14,640($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f16,656($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f18,672($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f20,688($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f22,704($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f24,720($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f26,736($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f28,752($4)'
   arch/mips/kernel/r4k_switch.S:67: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f30,768($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f0,528($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f2,544($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f4,560($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f6,576($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f8,592($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f10,608($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f12,624($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f14,640($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f16,656($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f18,672($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f20,688($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f22,704($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f24,720($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f26,736($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f28,752($4)'
   arch/mips/kernel/r4k_switch.S:129: Error: opcode not supported on this processor: r4600 (mips3) `sdc1 $f30,768($4)'
>> arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f0,528($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f2,544($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f4,560($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f6,576($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f8,592($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f10,608($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f12,624($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f14,640($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f16,656($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f18,672($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f20,688($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f22,704($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f24,720($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f26,736($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f28,752($4)'
   arch/mips/kernel/r4k_switch.S:140: Error: opcode not supported on this processor: r4600 (mips3) `ldc1 $f30,768($4)'
>> arch/mips/kernel/r4k_switch.S:233: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f0'
>> arch/mips/kernel/r4k_switch.S:234: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f2'
>> arch/mips/kernel/r4k_switch.S:235: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f4'
>> arch/mips/kernel/r4k_switch.S:236: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f6'
>> arch/mips/kernel/r4k_switch.S:237: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f8'
>> arch/mips/kernel/r4k_switch.S:238: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f10'
>> arch/mips/kernel/r4k_switch.S:239: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f12'
>> arch/mips/kernel/r4k_switch.S:240: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f14'
>> arch/mips/kernel/r4k_switch.S:241: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f16'
>> arch/mips/kernel/r4k_switch.S:242: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f18'
>> arch/mips/kernel/r4k_switch.S:243: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f20'
>> arch/mips/kernel/r4k_switch.S:244: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f22'
>> arch/mips/kernel/r4k_switch.S:245: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f24'
>> arch/mips/kernel/r4k_switch.S:246: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f26'
>> arch/mips/kernel/r4k_switch.S:247: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f28'
>> arch/mips/kernel/r4k_switch.S:248: Error: opcode not supported on this processor: mips3 (mips3) `dmtc1 $9,$f30'

vim +67 arch/mips/kernel/r4k_switch.S

^1da177e Linus Torvalds 2005-04-16   61  	 */
^1da177e Linus Torvalds 2005-04-16   62  	LONG_L	t0, ST_OFF(t3)
^1da177e Linus Torvalds 2005-04-16   63  	li	t1, ~ST0_CU1
^1da177e Linus Torvalds 2005-04-16   64  	and	t0, t0, t1
^1da177e Linus Torvalds 2005-04-16   65  	LONG_S	t0, ST_OFF(t3)
^1da177e Linus Torvalds 2005-04-16   66  
c138e12f Atsushi Nemoto 2006-05-23  @67  	fpu_save_double a0 t0 t1		# c0_status passed in t0
c138e12f Atsushi Nemoto 2006-05-23   68  						# clobbers t1
^1da177e Linus Torvalds 2005-04-16   69  1:
^1da177e Linus Torvalds 2005-04-16   70  
1400eb65 Gregory Fong   2013-06-17   71  #if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
8b3c569a James Hogan    2013-10-07   72  	PTR_LA	t8, __stack_chk_guard
1400eb65 Gregory Fong   2013-06-17   73  	LONG_L	t9, TASK_STACK_CANARY(a1)
1400eb65 Gregory Fong   2013-06-17   74  	LONG_S	t9, 0(t8)
1400eb65 Gregory Fong   2013-06-17   75  #endif
1400eb65 Gregory Fong   2013-06-17   76  
^1da177e Linus Torvalds 2005-04-16   77  	/*
^1da177e Linus Torvalds 2005-04-16   78  	 * The order of restoring the registers takes care of the race
^1da177e Linus Torvalds 2005-04-16   79  	 * updating $28, $29 and kernelsp without disabling ints.
^1da177e Linus Torvalds 2005-04-16   80  	 */
^1da177e Linus Torvalds 2005-04-16   81  	move	$28, a2
^1da177e Linus Torvalds 2005-04-16   82  	cpu_restore_nonscratch a1
^1da177e Linus Torvalds 2005-04-16   83  
3bd39664 Ralf Baechle   2007-07-11   84  	PTR_ADDU	t0, $28, _THREAD_SIZE - 32
^1da177e Linus Torvalds 2005-04-16   85  	set_saved_sp	t0, t1, t2
41c594ab Ralf Baechle   2006-04-05   86  #ifdef CONFIG_MIPS_MT_SMTC
41c594ab Ralf Baechle   2006-04-05   87  	/* Read-modify-writes of Status must be atomic on a VPE */
41c594ab Ralf Baechle   2006-04-05   88  	mfc0	t2, CP0_TCSTATUS
41c594ab Ralf Baechle   2006-04-05   89  	ori	t1, t2, TCSTATUS_IXMT
41c594ab Ralf Baechle   2006-04-05   90  	mtc0	t1, CP0_TCSTATUS
41c594ab Ralf Baechle   2006-04-05   91  	andi	t2, t2, TCSTATUS_IXMT
4277ff5e Ralf Baechle   2006-06-03   92  	_ehb
41c594ab Ralf Baechle   2006-04-05   93  	DMT	8				# dmt	t0
41c594ab Ralf Baechle   2006-04-05   94  	move	t1,ra
41c594ab Ralf Baechle   2006-04-05   95  	jal	mips_ihb
41c594ab Ralf Baechle   2006-04-05   96  	move	ra,t1
41c594ab Ralf Baechle   2006-04-05   97  #endif /* CONFIG_MIPS_MT_SMTC */
^1da177e Linus Torvalds 2005-04-16   98  	mfc0	t1, CP0_STATUS		/* Do we really need this? */
^1da177e Linus Torvalds 2005-04-16   99  	li	a3, 0xff01
^1da177e Linus Torvalds 2005-04-16  100  	and	t1, a3
^1da177e Linus Torvalds 2005-04-16  101  	LONG_L	a2, THREAD_STATUS(a1)
^1da177e Linus Torvalds 2005-04-16  102  	nor	a3, $0, a3
^1da177e Linus Torvalds 2005-04-16  103  	and	a2, a3
^1da177e Linus Torvalds 2005-04-16  104  	or	a2, t1
^1da177e Linus Torvalds 2005-04-16  105  	mtc0	a2, CP0_STATUS
41c594ab Ralf Baechle   2006-04-05  106  #ifdef CONFIG_MIPS_MT_SMTC
4277ff5e Ralf Baechle   2006-06-03  107  	_ehb
41c594ab Ralf Baechle   2006-04-05  108  	andi	t0, t0, VPECONTROL_TE
41c594ab Ralf Baechle   2006-04-05  109  	beqz	t0, 1f
41c594ab Ralf Baechle   2006-04-05  110  	emt
41c594ab Ralf Baechle   2006-04-05  111  1:
41c594ab Ralf Baechle   2006-04-05  112  	mfc0	t1, CP0_TCSTATUS
41c594ab Ralf Baechle   2006-04-05  113  	xori	t1, t1, TCSTATUS_IXMT
41c594ab Ralf Baechle   2006-04-05  114  	or	t1, t1, t2
41c594ab Ralf Baechle   2006-04-05  115  	mtc0	t1, CP0_TCSTATUS
4277ff5e Ralf Baechle   2006-06-03  116  	_ehb
41c594ab Ralf Baechle   2006-04-05  117  #endif /* CONFIG_MIPS_MT_SMTC */
^1da177e Linus Torvalds 2005-04-16  118  	move	v0, a0
^1da177e Linus Torvalds 2005-04-16  119  	jr	ra
^1da177e Linus Torvalds 2005-04-16  120  	END(resume)
^1da177e Linus Torvalds 2005-04-16  121  
^1da177e Linus Torvalds 2005-04-16  122  /*
^1da177e Linus Torvalds 2005-04-16  123   * Save a thread's fp context.
^1da177e Linus Torvalds 2005-04-16  124   */
^1da177e Linus Torvalds 2005-04-16  125  LEAF(_save_fp)
875d43e7 Ralf Baechle   2005-09-03  126  #ifdef CONFIG_64BIT
c138e12f Atsushi Nemoto 2006-05-23  127  	mfc0	t0, CP0_STATUS
^1da177e Linus Torvalds 2005-04-16  128  #endif
c138e12f Atsushi Nemoto 2006-05-23 @129  	fpu_save_double a0 t0 t1		# clobbers t1
^1da177e Linus Torvalds 2005-04-16  130  	jr	ra
^1da177e Linus Torvalds 2005-04-16  131  	END(_save_fp)
^1da177e Linus Torvalds 2005-04-16  132  
^1da177e Linus Torvalds 2005-04-16  133  /*
^1da177e Linus Torvalds 2005-04-16  134   * Restore a thread's fp context.
^1da177e Linus Torvalds 2005-04-16  135   */
^1da177e Linus Torvalds 2005-04-16  136  LEAF(_restore_fp)
c138e12f Atsushi Nemoto 2006-05-23  137  #ifdef CONFIG_64BIT
c138e12f Atsushi Nemoto 2006-05-23  138  	mfc0	t0, CP0_STATUS
c138e12f Atsushi Nemoto 2006-05-23  139  #endif
c138e12f Atsushi Nemoto 2006-05-23 @140  	fpu_restore_double a0 t0 t1		# clobbers t1
^1da177e Linus Torvalds 2005-04-16  141  	jr	ra
^1da177e Linus Torvalds 2005-04-16  142  	END(_restore_fp)
^1da177e Linus Torvalds 2005-04-16  143  
^1da177e Linus Torvalds 2005-04-16  144  /*
^1da177e Linus Torvalds 2005-04-16  145   * Load the FPU with signalling NANS.  This bit pattern we're using has
^1da177e Linus Torvalds 2005-04-16  146   * the property that no matter whether considered as single or as double
^1da177e Linus Torvalds 2005-04-16  147   * precision represents signaling NANS.
^1da177e Linus Torvalds 2005-04-16  148   *
^1da177e Linus Torvalds 2005-04-16  149   * We initialize fcr31 to rounding to nearest, no exceptions.
^1da177e Linus Torvalds 2005-04-16  150   */
^1da177e Linus Torvalds 2005-04-16  151  
^1da177e Linus Torvalds 2005-04-16  152  #define FPU_DEFAULT  0x00000000
^1da177e Linus Torvalds 2005-04-16  153  
^1da177e Linus Torvalds 2005-04-16  154  LEAF(_init_fpu)
41c594ab Ralf Baechle   2006-04-05  155  #ifdef CONFIG_MIPS_MT_SMTC
41c594ab Ralf Baechle   2006-04-05  156  	/* Rather than manipulate per-VPE Status, set per-TC bit in TCStatus */
41c594ab Ralf Baechle   2006-04-05  157  	mfc0	t0, CP0_TCSTATUS
41c594ab Ralf Baechle   2006-04-05  158  	/* Bit position is the same for Status, TCStatus */
41c594ab Ralf Baechle   2006-04-05  159  	li	t1, ST0_CU1
41c594ab Ralf Baechle   2006-04-05  160  	or	t0, t1
41c594ab Ralf Baechle   2006-04-05  161  	mtc0	t0, CP0_TCSTATUS
41c594ab Ralf Baechle   2006-04-05  162  #else /* Normal MIPS CU1 enable */
^1da177e Linus Torvalds 2005-04-16  163  	mfc0	t0, CP0_STATUS
^1da177e Linus Torvalds 2005-04-16  164  	li	t1, ST0_CU1
^1da177e Linus Torvalds 2005-04-16  165  	or	t0, t1
^1da177e Linus Torvalds 2005-04-16  166  	mtc0	t0, CP0_STATUS
41c594ab Ralf Baechle   2006-04-05  167  #endif /* CONFIG_MIPS_MT_SMTC */
f9509c84 Chris Dearman  2007-05-17  168  	enable_fpu_hazard
^1da177e Linus Torvalds 2005-04-16  169  
^1da177e Linus Torvalds 2005-04-16  170  	li	t1, FPU_DEFAULT
^1da177e Linus Torvalds 2005-04-16  171  	ctc1	t1, fcr31
^1da177e Linus Torvalds 2005-04-16  172  
^1da177e Linus Torvalds 2005-04-16  173  	li	t1, -1				# SNaN
^1da177e Linus Torvalds 2005-04-16  174  
875d43e7 Ralf Baechle   2005-09-03  175  #ifdef CONFIG_64BIT
^1da177e Linus Torvalds 2005-04-16  176  	sll	t0, t0, 5
^1da177e Linus Torvalds 2005-04-16  177  	bgez	t0, 1f				# 16 / 32 register mode?
^1da177e Linus Torvalds 2005-04-16  178  
^1da177e Linus Torvalds 2005-04-16  179  	dmtc1	t1, $f1
^1da177e Linus Torvalds 2005-04-16  180  	dmtc1	t1, $f3
^1da177e Linus Torvalds 2005-04-16  181  	dmtc1	t1, $f5
^1da177e Linus Torvalds 2005-04-16  182  	dmtc1	t1, $f7
^1da177e Linus Torvalds 2005-04-16  183  	dmtc1	t1, $f9
^1da177e Linus Torvalds 2005-04-16  184  	dmtc1	t1, $f11
^1da177e Linus Torvalds 2005-04-16  185  	dmtc1	t1, $f13
^1da177e Linus Torvalds 2005-04-16  186  	dmtc1	t1, $f15
^1da177e Linus Torvalds 2005-04-16  187  	dmtc1	t1, $f17
^1da177e Linus Torvalds 2005-04-16  188  	dmtc1	t1, $f19
^1da177e Linus Torvalds 2005-04-16  189  	dmtc1	t1, $f21
^1da177e Linus Torvalds 2005-04-16  190  	dmtc1	t1, $f23
^1da177e Linus Torvalds 2005-04-16  191  	dmtc1	t1, $f25
^1da177e Linus Torvalds 2005-04-16  192  	dmtc1	t1, $f27
^1da177e Linus Torvalds 2005-04-16  193  	dmtc1	t1, $f29
^1da177e Linus Torvalds 2005-04-16  194  	dmtc1	t1, $f31
^1da177e Linus Torvalds 2005-04-16  195  1:
^1da177e Linus Torvalds 2005-04-16  196  #endif
^1da177e Linus Torvalds 2005-04-16  197  
^1da177e Linus Torvalds 2005-04-16  198  #ifdef CONFIG_CPU_MIPS32
^1da177e Linus Torvalds 2005-04-16  199  	mtc1	t1, $f0
^1da177e Linus Torvalds 2005-04-16  200  	mtc1	t1, $f1
^1da177e Linus Torvalds 2005-04-16  201  	mtc1	t1, $f2
^1da177e Linus Torvalds 2005-04-16  202  	mtc1	t1, $f3
^1da177e Linus Torvalds 2005-04-16  203  	mtc1	t1, $f4
^1da177e Linus Torvalds 2005-04-16  204  	mtc1	t1, $f5
^1da177e Linus Torvalds 2005-04-16  205  	mtc1	t1, $f6
^1da177e Linus Torvalds 2005-04-16  206  	mtc1	t1, $f7
^1da177e Linus Torvalds 2005-04-16  207  	mtc1	t1, $f8
^1da177e Linus Torvalds 2005-04-16  208  	mtc1	t1, $f9
^1da177e Linus Torvalds 2005-04-16  209  	mtc1	t1, $f10
^1da177e Linus Torvalds 2005-04-16  210  	mtc1	t1, $f11
^1da177e Linus Torvalds 2005-04-16  211  	mtc1	t1, $f12
^1da177e Linus Torvalds 2005-04-16  212  	mtc1	t1, $f13
^1da177e Linus Torvalds 2005-04-16  213  	mtc1	t1, $f14
^1da177e Linus Torvalds 2005-04-16  214  	mtc1	t1, $f15
^1da177e Linus Torvalds 2005-04-16  215  	mtc1	t1, $f16
^1da177e Linus Torvalds 2005-04-16  216  	mtc1	t1, $f17
^1da177e Linus Torvalds 2005-04-16  217  	mtc1	t1, $f18
^1da177e Linus Torvalds 2005-04-16  218  	mtc1	t1, $f19
^1da177e Linus Torvalds 2005-04-16  219  	mtc1	t1, $f20
^1da177e Linus Torvalds 2005-04-16  220  	mtc1	t1, $f21
^1da177e Linus Torvalds 2005-04-16  221  	mtc1	t1, $f22
^1da177e Linus Torvalds 2005-04-16  222  	mtc1	t1, $f23
^1da177e Linus Torvalds 2005-04-16  223  	mtc1	t1, $f24
^1da177e Linus Torvalds 2005-04-16  224  	mtc1	t1, $f25
^1da177e Linus Torvalds 2005-04-16  225  	mtc1	t1, $f26
^1da177e Linus Torvalds 2005-04-16  226  	mtc1	t1, $f27
^1da177e Linus Torvalds 2005-04-16  227  	mtc1	t1, $f28
^1da177e Linus Torvalds 2005-04-16  228  	mtc1	t1, $f29
^1da177e Linus Torvalds 2005-04-16  229  	mtc1	t1, $f30
^1da177e Linus Torvalds 2005-04-16  230  	mtc1	t1, $f31
^1da177e Linus Torvalds 2005-04-16  231  #else
^1da177e Linus Torvalds 2005-04-16  232  	.set	mips3
^1da177e Linus Torvalds 2005-04-16 @233  	dmtc1	t1, $f0
^1da177e Linus Torvalds 2005-04-16 @234  	dmtc1	t1, $f2
^1da177e Linus Torvalds 2005-04-16 @235  	dmtc1	t1, $f4
^1da177e Linus Torvalds 2005-04-16 @236  	dmtc1	t1, $f6
^1da177e Linus Torvalds 2005-04-16 @237  	dmtc1	t1, $f8
^1da177e Linus Torvalds 2005-04-16 @238  	dmtc1	t1, $f10
^1da177e Linus Torvalds 2005-04-16 @239  	dmtc1	t1, $f12
^1da177e Linus Torvalds 2005-04-16 @240  	dmtc1	t1, $f14
^1da177e Linus Torvalds 2005-04-16 @241  	dmtc1	t1, $f16
^1da177e Linus Torvalds 2005-04-16 @242  	dmtc1	t1, $f18
^1da177e Linus Torvalds 2005-04-16 @243  	dmtc1	t1, $f20
^1da177e Linus Torvalds 2005-04-16 @244  	dmtc1	t1, $f22
^1da177e Linus Torvalds 2005-04-16 @245  	dmtc1	t1, $f24
^1da177e Linus Torvalds 2005-04-16 @246  	dmtc1	t1, $f26
^1da177e Linus Torvalds 2005-04-16 @247  	dmtc1	t1, $f28
^1da177e Linus Torvalds 2005-04-16 @248  	dmtc1	t1, $f30
^1da177e Linus Torvalds 2005-04-16  249  #endif
^1da177e Linus Torvalds 2005-04-16  250  	jr	ra
^1da177e Linus Torvalds 2005-04-16  251  	END(_init_fpu)

:::::: The code at line 67 was first introduced by commit
:::::: c138e12f3a2e0421a4c8edf02587d2d394418679 [MIPS] Fix fpu_save_double on 64-bit.

:::::: TO: Atsushi Nemoto <anemo@xxxxxxxxxxxxx>
:::::: CC: Ralf Baechle <ralf@xxxxxxxxxxxxxx>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

Attachment: .config.gz
Description: Binary data


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