[linux-stable-rc:linux-3.14.y 1941/4787] arch/mips/kernel/r4k_fpu.S:68: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f0,272+0($4)'

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Hi,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-3.14.y
head:   836a24d6291c76c802d0968be9efb050dbf955e6
commit: 017ff97daa4a7892181a4dd315c657108419da0c [1941/4787] kernel: add support for gcc 5
config: mips-jz4740 (attached as .config)
compiler: mipsel-linux-gnu-gcc (Debian 5.3.1-8) 5.3.1 20160205
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout 017ff97daa4a7892181a4dd315c657108419da0c
        # save the attached .config to linux build tree
        make.cross ARCH=mips 

All errors (new ones prefixed by >>):

   arch/mips/kernel/r4k_fpu.S: Assembler messages:
>> arch/mips/kernel/r4k_fpu.S:68: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f0,272+0($4)'
   arch/mips/kernel/r4k_fpu.S:69: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f2,272+16($4)'
   arch/mips/kernel/r4k_fpu.S:70: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f4,272+32($4)'
   arch/mips/kernel/r4k_fpu.S:71: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f6,272+48($4)'
   arch/mips/kernel/r4k_fpu.S:72: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f8,272+64($4)'
   arch/mips/kernel/r4k_fpu.S:73: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f10,272+80($4)'
   arch/mips/kernel/r4k_fpu.S:74: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f12,272+96($4)'
   arch/mips/kernel/r4k_fpu.S:75: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f14,272+112($4)'
   arch/mips/kernel/r4k_fpu.S:76: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f16,272+128($4)'
   arch/mips/kernel/r4k_fpu.S:77: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f18,272+144($4)'
   arch/mips/kernel/r4k_fpu.S:78: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f20,272+160($4)'
   arch/mips/kernel/r4k_fpu.S:79: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f22,272+176($4)'
   arch/mips/kernel/r4k_fpu.S:80: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f24,272+192($4)'
   arch/mips/kernel/r4k_fpu.S:81: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f26,272+208($4)'
   arch/mips/kernel/r4k_fpu.S:82: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f28,272+224($4)'
   arch/mips/kernel/r4k_fpu.S:83: Error: opcode not supported on this processor: mips3 (mips3) `sdc1 $f30,272+240($4)'
>> arch/mips/kernel/r4k_fpu.S:178: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f0,272+0($4)'
   arch/mips/kernel/r4k_fpu.S:179: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f2,272+16($4)'
   arch/mips/kernel/r4k_fpu.S:180: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f4,272+32($4)'
   arch/mips/kernel/r4k_fpu.S:181: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f6,272+48($4)'
   arch/mips/kernel/r4k_fpu.S:182: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f8,272+64($4)'
   arch/mips/kernel/r4k_fpu.S:183: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f10,272+80($4)'
   arch/mips/kernel/r4k_fpu.S:184: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f12,272+96($4)'
   arch/mips/kernel/r4k_fpu.S:185: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f14,272+112($4)'
   arch/mips/kernel/r4k_fpu.S:186: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f16,272+128($4)'
   arch/mips/kernel/r4k_fpu.S:187: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f18,272+144($4)'
   arch/mips/kernel/r4k_fpu.S:188: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f20,272+160($4)'
   arch/mips/kernel/r4k_fpu.S:189: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f22,272+176($4)'
   arch/mips/kernel/r4k_fpu.S:190: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f24,272+192($4)'
   arch/mips/kernel/r4k_fpu.S:191: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f26,272+208($4)'
   arch/mips/kernel/r4k_fpu.S:192: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f28,272+224($4)'
   arch/mips/kernel/r4k_fpu.S:193: Error: opcode not supported on this processor: mips3 (mips3) `ldc1 $f30,272+240($4)'

vim +68 arch/mips/kernel/r4k_fpu.S

^1da177e Linus Torvalds 2005-04-16   62  	EX	sdc1 $f29, SC_FPREGS+232(a0)
^1da177e Linus Torvalds 2005-04-16   63  	EX	sdc1 $f31, SC_FPREGS+248(a0)
597ce172 Paul Burton    2013-11-22   64  1:	.set	pop
^1da177e Linus Torvalds 2005-04-16   65  #endif
^1da177e Linus Torvalds 2005-04-16   66  
^1da177e Linus Torvalds 2005-04-16   67  	/* Store the 16 even double precision registers */
^1da177e Linus Torvalds 2005-04-16  @68  	EX	sdc1 $f0, SC_FPREGS+0(a0)
^1da177e Linus Torvalds 2005-04-16   69  	EX	sdc1 $f2, SC_FPREGS+16(a0)
^1da177e Linus Torvalds 2005-04-16   70  	EX	sdc1 $f4, SC_FPREGS+32(a0)
^1da177e Linus Torvalds 2005-04-16   71  	EX	sdc1 $f6, SC_FPREGS+48(a0)
^1da177e Linus Torvalds 2005-04-16   72  	EX	sdc1 $f8, SC_FPREGS+64(a0)
^1da177e Linus Torvalds 2005-04-16   73  	EX	sdc1 $f10, SC_FPREGS+80(a0)
^1da177e Linus Torvalds 2005-04-16   74  	EX	sdc1 $f12, SC_FPREGS+96(a0)
^1da177e Linus Torvalds 2005-04-16  @75  	EX	sdc1 $f14, SC_FPREGS+112(a0)
^1da177e Linus Torvalds 2005-04-16   76  	EX	sdc1 $f16, SC_FPREGS+128(a0)
^1da177e Linus Torvalds 2005-04-16   77  	EX	sdc1 $f18, SC_FPREGS+144(a0)
^1da177e Linus Torvalds 2005-04-16   78  	EX	sdc1 $f20, SC_FPREGS+160(a0)
^1da177e Linus Torvalds 2005-04-16   79  	EX	sdc1 $f22, SC_FPREGS+176(a0)
^1da177e Linus Torvalds 2005-04-16   80  	EX	sdc1 $f24, SC_FPREGS+192(a0)
^1da177e Linus Torvalds 2005-04-16   81  	EX	sdc1 $f26, SC_FPREGS+208(a0)
^1da177e Linus Torvalds 2005-04-16   82  	EX	sdc1 $f28, SC_FPREGS+224(a0)
^1da177e Linus Torvalds 2005-04-16   83  	EX	sdc1 $f30, SC_FPREGS+240(a0)
^1da177e Linus Torvalds 2005-04-16   84  	EX	sw t1, SC_FPC_CSR(a0)
^1da177e Linus Torvalds 2005-04-16   85  	jr	ra
^1da177e Linus Torvalds 2005-04-16   86  	 li	v0, 0					# success
^1da177e Linus Torvalds 2005-04-16   87  	END(_save_fp_context)
^1da177e Linus Torvalds 2005-04-16   88  
^1da177e Linus Torvalds 2005-04-16   89  #ifdef CONFIG_MIPS32_COMPAT
^1da177e Linus Torvalds 2005-04-16   90  	/* Save 32-bit process floating point context */
^1da177e Linus Torvalds 2005-04-16   91  LEAF(_save_fp_context32)
^1da177e Linus Torvalds 2005-04-16   92  	cfc1	t1, fcr31
^1da177e Linus Torvalds 2005-04-16   93  
597ce172 Paul Burton    2013-11-22   94  	mfc0	t0, CP0_STATUS
597ce172 Paul Burton    2013-11-22   95  	sll	t0, t0, 5
597ce172 Paul Burton    2013-11-22   96  	bgez	t0, 1f			# skip storing odd if FR=0
597ce172 Paul Burton    2013-11-22   97  	 nop
597ce172 Paul Burton    2013-11-22   98  
597ce172 Paul Burton    2013-11-22   99  	/* Store the 16 odd double precision registers */
597ce172 Paul Burton    2013-11-22  100  	EX      sdc1 $f1, SC32_FPREGS+8(a0)
597ce172 Paul Burton    2013-11-22  101  	EX      sdc1 $f3, SC32_FPREGS+24(a0)
597ce172 Paul Burton    2013-11-22  102  	EX      sdc1 $f5, SC32_FPREGS+40(a0)
597ce172 Paul Burton    2013-11-22  103  	EX      sdc1 $f7, SC32_FPREGS+56(a0)
597ce172 Paul Burton    2013-11-22  104  	EX      sdc1 $f9, SC32_FPREGS+72(a0)
597ce172 Paul Burton    2013-11-22  105  	EX      sdc1 $f11, SC32_FPREGS+88(a0)
597ce172 Paul Burton    2013-11-22  106  	EX      sdc1 $f13, SC32_FPREGS+104(a0)
597ce172 Paul Burton    2013-11-22  107  	EX      sdc1 $f15, SC32_FPREGS+120(a0)
597ce172 Paul Burton    2013-11-22  108  	EX      sdc1 $f17, SC32_FPREGS+136(a0)
597ce172 Paul Burton    2013-11-22  109  	EX      sdc1 $f19, SC32_FPREGS+152(a0)
597ce172 Paul Burton    2013-11-22  110  	EX      sdc1 $f21, SC32_FPREGS+168(a0)
597ce172 Paul Burton    2013-11-22  111  	EX      sdc1 $f23, SC32_FPREGS+184(a0)
597ce172 Paul Burton    2013-11-22  112  	EX      sdc1 $f25, SC32_FPREGS+200(a0)
597ce172 Paul Burton    2013-11-22  113  	EX      sdc1 $f27, SC32_FPREGS+216(a0)
597ce172 Paul Burton    2013-11-22  114  	EX      sdc1 $f29, SC32_FPREGS+232(a0)
597ce172 Paul Burton    2013-11-22  115  	EX      sdc1 $f31, SC32_FPREGS+248(a0)
597ce172 Paul Burton    2013-11-22  116  
597ce172 Paul Burton    2013-11-22  117  	/* Store the 16 even double precision registers */
597ce172 Paul Burton    2013-11-22  118  1:	EX	sdc1 $f0, SC32_FPREGS+0(a0)
^1da177e Linus Torvalds 2005-04-16  119  	EX	sdc1 $f2, SC32_FPREGS+16(a0)
^1da177e Linus Torvalds 2005-04-16  120  	EX	sdc1 $f4, SC32_FPREGS+32(a0)
^1da177e Linus Torvalds 2005-04-16  121  	EX	sdc1 $f6, SC32_FPREGS+48(a0)
^1da177e Linus Torvalds 2005-04-16  122  	EX	sdc1 $f8, SC32_FPREGS+64(a0)
^1da177e Linus Torvalds 2005-04-16  123  	EX	sdc1 $f10, SC32_FPREGS+80(a0)
^1da177e Linus Torvalds 2005-04-16  124  	EX	sdc1 $f12, SC32_FPREGS+96(a0)
^1da177e Linus Torvalds 2005-04-16  125  	EX	sdc1 $f14, SC32_FPREGS+112(a0)
^1da177e Linus Torvalds 2005-04-16  126  	EX	sdc1 $f16, SC32_FPREGS+128(a0)
^1da177e Linus Torvalds 2005-04-16  127  	EX	sdc1 $f18, SC32_FPREGS+144(a0)
^1da177e Linus Torvalds 2005-04-16  128  	EX	sdc1 $f20, SC32_FPREGS+160(a0)
^1da177e Linus Torvalds 2005-04-16  129  	EX	sdc1 $f22, SC32_FPREGS+176(a0)
^1da177e Linus Torvalds 2005-04-16  130  	EX	sdc1 $f24, SC32_FPREGS+192(a0)
^1da177e Linus Torvalds 2005-04-16  131  	EX	sdc1 $f26, SC32_FPREGS+208(a0)
^1da177e Linus Torvalds 2005-04-16  132  	EX	sdc1 $f28, SC32_FPREGS+224(a0)
^1da177e Linus Torvalds 2005-04-16  133  	EX	sdc1 $f30, SC32_FPREGS+240(a0)
^1da177e Linus Torvalds 2005-04-16  134  	EX	sw t1, SC32_FPC_CSR(a0)
^1da177e Linus Torvalds 2005-04-16  135  	cfc1	t0, $0				# implementation/version
^1da177e Linus Torvalds 2005-04-16  136  	EX	sw t0, SC32_FPC_EIR(a0)
^1da177e Linus Torvalds 2005-04-16  137  
^1da177e Linus Torvalds 2005-04-16  138  	jr	ra
^1da177e Linus Torvalds 2005-04-16  139  	 li	v0, 0					# success
^1da177e Linus Torvalds 2005-04-16  140  	END(_save_fp_context32)
^1da177e Linus Torvalds 2005-04-16  141  #endif
^1da177e Linus Torvalds 2005-04-16  142  
^1da177e Linus Torvalds 2005-04-16  143  /*
^1da177e Linus Torvalds 2005-04-16  144   * Restore FPU state:
^1da177e Linus Torvalds 2005-04-16  145   *  - fp gp registers
^1da177e Linus Torvalds 2005-04-16  146   *  - cp1 status/control register
^1da177e Linus Torvalds 2005-04-16  147   */
^1da177e Linus Torvalds 2005-04-16  148  LEAF(_restore_fp_context)
b616365e Huacai Chen    2014-02-07  149  	EX	lw t1, SC_FPC_CSR(a0)
597ce172 Paul Burton    2013-11-22  150  
f5868f05 Paul Bolle     2014-02-09  151  #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
597ce172 Paul Burton    2013-11-22  152  	.set	push
f5868f05 Paul Bolle     2014-02-09  153  #ifdef CONFIG_CPU_MIPS32_R2
597ce172 Paul Burton    2013-11-22  154  	.set	mips64r2
597ce172 Paul Burton    2013-11-22  155  	mfc0	t0, CP0_STATUS
597ce172 Paul Burton    2013-11-22  156  	sll	t0, t0, 5
597ce172 Paul Burton    2013-11-22  157  	bgez	t0, 1f			# skip loading odd if FR=0
597ce172 Paul Burton    2013-11-22  158  	 nop
597ce172 Paul Burton    2013-11-22  159  #endif
^1da177e Linus Torvalds 2005-04-16  160  	EX	ldc1 $f1, SC_FPREGS+8(a0)
^1da177e Linus Torvalds 2005-04-16  161  	EX	ldc1 $f3, SC_FPREGS+24(a0)
^1da177e Linus Torvalds 2005-04-16  162  	EX	ldc1 $f5, SC_FPREGS+40(a0)
^1da177e Linus Torvalds 2005-04-16  163  	EX	ldc1 $f7, SC_FPREGS+56(a0)
^1da177e Linus Torvalds 2005-04-16  164  	EX	ldc1 $f9, SC_FPREGS+72(a0)
^1da177e Linus Torvalds 2005-04-16  165  	EX	ldc1 $f11, SC_FPREGS+88(a0)
^1da177e Linus Torvalds 2005-04-16  166  	EX	ldc1 $f13, SC_FPREGS+104(a0)
^1da177e Linus Torvalds 2005-04-16  167  	EX	ldc1 $f15, SC_FPREGS+120(a0)
^1da177e Linus Torvalds 2005-04-16  168  	EX	ldc1 $f17, SC_FPREGS+136(a0)
^1da177e Linus Torvalds 2005-04-16  169  	EX	ldc1 $f19, SC_FPREGS+152(a0)
^1da177e Linus Torvalds 2005-04-16  170  	EX	ldc1 $f21, SC_FPREGS+168(a0)
^1da177e Linus Torvalds 2005-04-16  171  	EX	ldc1 $f23, SC_FPREGS+184(a0)
^1da177e Linus Torvalds 2005-04-16  172  	EX	ldc1 $f25, SC_FPREGS+200(a0)
^1da177e Linus Torvalds 2005-04-16  173  	EX	ldc1 $f27, SC_FPREGS+216(a0)
^1da177e Linus Torvalds 2005-04-16  174  	EX	ldc1 $f29, SC_FPREGS+232(a0)
^1da177e Linus Torvalds 2005-04-16  175  	EX	ldc1 $f31, SC_FPREGS+248(a0)
597ce172 Paul Burton    2013-11-22  176  1:	.set pop
^1da177e Linus Torvalds 2005-04-16  177  #endif
^1da177e Linus Torvalds 2005-04-16 @178  	EX	ldc1 $f0, SC_FPREGS+0(a0)
^1da177e Linus Torvalds 2005-04-16  179  	EX	ldc1 $f2, SC_FPREGS+16(a0)
^1da177e Linus Torvalds 2005-04-16  180  	EX	ldc1 $f4, SC_FPREGS+32(a0)
^1da177e Linus Torvalds 2005-04-16  181  	EX	ldc1 $f6, SC_FPREGS+48(a0)

:::::: The code at line 68 was first introduced by commit
:::::: 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 Linux-2.6.12-rc2

:::::: TO: Linus Torvalds <torvalds@xxxxxxxxxxxxxxx>
:::::: CC: Linus Torvalds <torvalds@xxxxxxxxxxxxxxx>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

Attachment: .config.gz
Description: Binary data


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