On Wed, Jan 29, 2025 at 01:32:46PM +0100, Aleksandar Rikalo wrote: > Taken from Paul Burton MIPS repo with minor changes from Chao-ying Fu. > Tested with 64r6el_defconfig on Boston board in 2 cluster/2 VPU and > 1 cluster/4 VPU configurations. > > v9: > - The changes related to the broken HCI have been removed as they are now part of a different series: > https://lore.kernel.org/linux-mips/20250123-cluster-hci-broken-v3-0-8a7ec57cbf68@xxxxxxxxxxx/ > - Re-base onto the master branch, with no functionality impact. > > v8: > - irqchip: mips-gic: Handle case with cluster without CPU cores. > - Add Tested-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx> for the entire series. > - Re-base onto the master branch, with no functionality impact. > > v7: > - Add fixes for specific CM3.5 which is used in EyeQ6H SoCs, > suggested by Gregory Clement. > - Re-base onto the master branch, with no functionality impact. > > v6: > - Re-base onto the master branch, with no functionality impact. > - Correct the issue reported by the kernel test robot. > > v5: > - Drop FDC related changes (patches 12, 13, and 14). > - Apply changes suggested by Thomas Gleixner (patches 3 and 4). > - Add #include <linux/cpumask.h> to patch 1, suggested by Thomas Bogendoerfer. > - Add Reviewed-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx> for the patch 08/11. > - Add Tested-by: Serge Semin <fancer.lancer@xxxxxxxxx> for the entire series. > - Correct some commit messages. > > v4: > - Re-base onto the master branch, with no functionality impact. > - Refactor MIPS FDC driver in the context of multicluster support. > > v3: > - Add Reviewed-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> for the patch 02/12. > - Add the changes requested by Marc Zyngier for the 3/12 patch. > - Remove the patch 11/12 (a consequence of a discussion between Jiaxun Yang > and Marc Zyngier. > - Re-base onto the master branch, with no functionality impact. > > v2: > - Apply correct Signed-off-by to avoid confusion. > > Paul Burton (4): > clocksource: mips-gic-timer: Enable counter when CPUs start > MIPS: pm-cps: Use per-CPU variables as per-CPU, not per-core > MIPS: CPS: Introduce struct cluster_boot_config > MIPS: CPS: Boot CPUs in secondary clusters > > arch/mips/include/asm/mips-cm.h | 18 ++ > arch/mips/include/asm/smp-cps.h | 7 +- > arch/mips/kernel/asm-offsets.c | 3 + > arch/mips/kernel/cps-vec.S | 19 +- > arch/mips/kernel/mips-cm.c | 4 +- > arch/mips/kernel/pm-cps.c | 35 ++-- > arch/mips/kernel/smp-cps.c | 285 ++++++++++++++++++++++----- > drivers/clocksource/mips-gic-timer.c | 6 +- > 8 files changed, 307 insertions(+), 70 deletions(-) series applied to mips-next. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
