On Wed, Jan 22, 2025 at 8:05 PM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote: > > > > 在2025年1月20日一月 上午1:52，Chuanhong Guo写道： > > Siflower MIPS SoCs like SF19A2890 uses dual-core MIPS InterAptiv > > processor, built-in GMAC, USB, dual-band WiFi and various other > > peripherals. > > Notably, it uses some ARM PLxxx peripherals, and ARM_AMBA is > > selected for the drivers. > > Most devices on the market with this chip come with 64M or less > > DRAM. A kmalloc.h with malloc alignment override is added to > > conserve memory, and a MACH_SIFLOWER_MIPS is created with reduced > > features instead of using the generic kernel. > > > > Signed-off-by: Chuanhong Guo <gch981213@xxxxxxxxx> > > Hmm, why not using MIPS_GENERIC. Mainly to override MIPS_L1_CACHE_SHIFT and ARCH_DMA_MINALIGN. This saves about 1MB of memory if I remember correctly. -- Regards, Chuanhong Guo
