On 17/12/2024 07:52, Conor Dooley wrote:
On Mon, Dec 16, 2024 at 04:13:43PM +1300, Chris Packham wrote:
Add dtschema for the MDIO controller found in the RTL9300 SoCs. The
controller is slightly unusual in that direct MDIO communication is not
possible. Instead, the SMI bus and PHY address are associated with a
switch port and the port number is used when talking to the PHY.
Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
+ realtek,smi-address:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: SMI interface and address for the connected PHY
+ items:
+ - description: SMI interface number associated with the port.
+ - description: SMI address of the PHY for the port.
I don't really understand this property, but I also don't understand the
MDIO bus, so with that caveat
Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
I'll try to clarify here as it may be of relevance to other reviewers,
if any of this should go in the commit message or the binding let me know.
The MDIO bus is used to manage one or more network PHYs. Sometimes there
is an MDIO interface as part of a NIC controller but it's become
increasingly common to have a the MDIO controller separated from the
Ethernet controller, particularly when there are multiple Ethernet
controllers in a SoC. In the device trees there is a usually a node for
the MDIO controller and the attached PHYs are child nodes. The Ethernet
interface has phandle property which references the attached PHY.
The RTL9300 (and similar Realtek Ethernet switches) don't directly
expose the MDIO interface to us. There seems to be an internal PHY
polling mechanism and the user access to the PHYs works in conjunction
with that. So rather than being able to reference PHYs and MDIO
interfaces directly we need to work with switch port numbers instead.
The actual hardware MDIO bus and PHY address is captured in the
"realtek,smi-address" property.
