On Wed, Oct 16, 2024 at 11:54:33AM +1300, Chris Packham wrote:
> Add the SPI-NAND controller on the RTL9300 family of devices. This
> supports serial/dual/quad data width and DMA for read/program
> operations.
>
> Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
> ---
>
> Notes:
> Changes in v4 & v5:
> - none
> Changes in v3:
> - drop wildcard rtl9300-snand compatible
> - drop clock-names
> Changes in v2:
> - Add clocks
>
> arch/mips/boot/dts/realtek/rtl930x.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
> index f271940f82be..b01a40ec3064 100644
> --- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
> +++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
> @@ -32,6 +32,8 @@ lx_clk: clock-175mhz {
> };
>
> &soc {
> + ranges = <0x0 0x18000000 0x20000>;
> +
> intc: interrupt-controller@3000 {
> compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
> reg = <0x3000 0x18>, <0x3018 0x18>;
> @@ -59,6 +61,17 @@ timer0: timer@3200 {
> interrupts = <7>, <8>, <9>, <10>, <11>;
> clocks = <&lx_clk>;
> };
> +
> + snand: spi@1a400 {
> + compatible = "realtek,rtl9301-snand";
> + reg = <0x1a400 0x44>;
> + interrupt-parent = <&intc>;
> + interrupts = <19>;
> + clocks = <&lx_clk>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> };
>
> &uart0 {
> --
> 2.47.0
applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
