From: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> Add devicetree binding documentation for MIPS Coherence Manager. gc: reg is no more mandatory Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx> --- .../devicetree/bindings/mips/mti,mips-cm.yaml | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml new file mode 100644 index 0000000000000000000000000000000000000000..03a5ba5624a429c428ee2afca73b3e29127e02f9 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/mti,mips-cm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MIPS Coherence Manager + +description: | + Defines a location of the MIPS Coherence Manager registers. + +maintainers: + - Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> + +properties: + compatible: + const: mti,mips-cm + + reg: + description: + Base address and size of an unoccupied region in system's MMIO address + space, which will be used to map the MIPS CM global control registers + block. It is conventionally decided by the system integrator. + maxItems: 1 + +required: + - compatible + +additionalProperties: false + +examples: + - | + coherency-manager@1fbf8000 { + compatible = "mti,mips-cm"; + reg = <0x1bde8000 0x8000>; + }; +... -- 2.45.2
