The board level reset on systems using the RTL9302 can be driven via the
switch. Use a syscon-reboot node to represent this.
Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
---
Notes:
Changes in v7:
- None
Changes in v6:
- Drop wildcard compatible
Changes in v5:
- Krzysztof did technically give a r-by on v4 but given the changes to
the rest of the series I haven't included it.
- Use reg instead of offset
- Add a rtl9302c.dtsi for the specific chip which pulls in the generic
rtl930x.dtsi and updates a few of the compatibles on the way through.
- Update Cameo board to use rtl9302c.dtsi
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- drop redundant status = "okay"
.../dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts | 2 +-
arch/mips/boot/dts/realtek/rtl9302c.dtsi | 7 +++++++
arch/mips/boot/dts/realtek/rtl930x.dtsi | 13 +++++++++++++
3 files changed, 21 insertions(+), 1 deletion(-)
create mode 100644 arch/mips/boot/dts/realtek/rtl9302c.dtsi
diff --git a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
index 77d2566545f2..6789bf374044 100644
--- a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
+++ b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/dts-v1/;
-#include "rtl930x.dtsi"
+#include "rtl9302c.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/mips/boot/dts/realtek/rtl9302c.dtsi b/arch/mips/boot/dts/realtek/rtl9302c.dtsi
new file mode 100644
index 000000000000..ca4d347af8d3
--- /dev/null
+++ b/arch/mips/boot/dts/realtek/rtl9302c.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
+
+#include "rtl930x.dtsi"
+
+&switch0 {
+ compatible = "realtek,rtl9302c-switch", "syscon", "simple-mfd";
+};
diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
index f271940f82be..7477fae34987 100644
--- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
@@ -29,6 +29,19 @@ lx_clk: clock-175mhz {
#clock-cells = <0>;
clock-frequency = <175000000>;
};
+
+ switch0: switch@1b000000 {
+ compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd";
+ reg = <0x1b000000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ reboot@c {
+ compatible = "syscon-reboot";
+ reg = <0x0c 0x4>;
+ value = <0x01>;
+ };
+ };
};
&soc {
--
2.47.0
