On Mon, Oct 07, 2024 at 12:33:45PM +1300, Chris Packham wrote: > Add a dtschema for the SPI-NAND controller on the RTL9300 SoCs. The > controller supports > * Serial/Dual/Quad data with > * PIO and DMA data read/write operation > * Configurable flash access timing > > Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> > --- > .../bindings/spi/realtek,rtl9300-snand.yaml | 58 +++++++++++++++++++ > 1 file changed, 58 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml > > diff --git a/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml > new file mode 100644 > index 000000000000..c66aea24cb35 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/realtek,rtl9300-snand.yaml > @@ -0,0 +1,58 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/realtek,rtl9300-snand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: SPI-NAND Flash Controller for Realtek RTL9300 SoCs > + > +maintainers: > + - Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> > + > +description: > + The Realtek RTL9300 SoCs have a built in SPI-NAND controller. It supports > + typical SPI-NAND page cache operations in single, dual or quad IO mode. > + > +properties: > + compatible: > + items: > + - enum: > + - realtek,rtl9301-snand > + - realtek,rtl9302b-snand > + - realtek,rtl9302c-snand > + - realtek,rtl9303-snand > + - const: realtek,rtl9300-snand > + > + reg: > + items: > + - description: SPI NAND controller registers address and size > + Also: why no clocks? Binding is supposed to be complete. If it cannot, you should explain it in the commit msg. Best regards, Krzysztof
