On Wed, Jun 12, 2024 at 11:08:57AM +0100, Jiaxun Yang wrote: > Add devicetree binding documentation for MIPS Coherence Manager. > > Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> > --- > v2: > - Better wording for register desc > - cm -> coherency-manager > - schema matches compatible > --- > .../devicetree/bindings/mips/mti,mips-cm.yaml | 38 ++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml > new file mode 100644 > index 000000000000..9f500804737d > --- /dev/null > +++ b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml > @@ -0,0 +1,38 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mips/mti,mips-cm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MIPS Coherence Manager > + > +description: | > + Defines a location of the MIPS Coherence Manager registers. > + > +maintainers: > + - Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> > + > +properties: > + compatible: > + const: mti,mips-cm > + > + reg: > + description: > + Base address and size of an unoccupied region in system's MMIO address > + space, which will be used to map the MIPS CM global control registers > + block. It is conventionally decided by the system integrator. > + maxItems: 1 Could you please extend the reg array to containing two values: gcr and l2sync? The later is the L2-cache-only sync region which can be customized by the CM means. It's better to define the reg-names property too, so the node would look like this: cm2: cm2@1fbf8000 { compatible = "mti,mips-cm"; reg = <0 0x1fbf8000 0 0x8000>, <0 0x1fbf0000 0 0x1000>; reg-names = "gcr", "l2sync"; }; -Serge(y) > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + coherency-manager@1fbf8000 { > + compatible = "mti,mips-cm"; > + reg = <0x1bde8000 0x8000>; > + }; > +... > > -- > 2.43.0 >
