On Mon, 17 Jun 2024, Nathan Chancellor wrote: > Even with that addressed though, I see another issue in an allmodconfig > when building arch/mips/kernel/cps-vec.S that I don't recall seeing > before: > > arch/mips/kernel/cps-vec.S:363:2: error: instruction requires a CPU feature not currently enabled > jr.hb $9 > ^ > arch/mips/kernel/cps-vec.S:477:4: error: instruction requires a CPU feature not currently enabled > 1: jr.hb $8 > ^ JR.HB is supposed to be permitted for MIPSr1 as a backwards compatible ISA extension, even though coming from MIPSr2 and not originally a part of the MIPSr1 ISA (although there was an erratum in some MIPS 4Kc cores that caused an RI exception with this encoding). FWIW, Maciej
