Hi all, This series combined many enhancements for MIPS clocksource subsystems, It improved r4k count synchronisation process, clock source rating for selection, sched_clock eligibility and so on. It seems fixed random RCU stall issue on Loongson 3A4000 multi-node system and some boot failures on QEMU. Please review. Thanks Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> --- Changes in v2: - Fix number of zeros in rating computation (Maciej) - Only select HAVE_UNSTABLE_SCHED_CLOCK for SMP (Maciej) - Link to v1: https://lore.kernel.org/r/20240511-mips-clks-v1-0-ddb4a10ee9f9@xxxxxxxxxxx --- Jiaxun Yang (7): MIPS: csrc-r4k: Refine rating computation MIPS: csrc-r4k: Apply verification clocksource flags MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT MIPS: csrc-r4k: Don't register as sched_clock if unfit MIPS: sync-r4k: Rework based on x86 tsc_sync clocksource: mips-gic-timer: Refine rating computation clocksource: mips-gic-timer: Correct sched_clock width arch/mips/Kconfig | 1 + arch/mips/include/asm/r4k-timer.h | 5 - arch/mips/kernel/csrc-r4k.c | 24 ++- arch/mips/kernel/smp.c | 2 - arch/mips/kernel/sync-r4k.c | 281 +++++++++++++++++++++++++---------- drivers/clocksource/mips-gic-timer.c | 20 ++- 6 files changed, 234 insertions(+), 99 deletions(-) --- base-commit: 704ba27ac55579704ba1289392448b0c66b56258 change-id: 20240509-mips-clks-9001264fcfbe Best regards, -- Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
