On Sat, 11 May 2024 15:03:46 +0200, Christian Marangi wrote: > Document brcm,bmips-cbr-reg property. > > Some SoC suffer from a BUG where CBR(Core Base Register) > address might be badly or never initialized by the Bootloader > or reading it from co-processor registers, if the system boots > from secondary CPU, results in invalid address. > > The CBR address is always the same on the SoC. > > Usage of this property is to give an address also in these broken > configuration/bootloader. > > Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx> > Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > --- > .../devicetree/bindings/mips/brcm/soc.yaml | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
