On Wed, May 08, 2024 at 09:28:27PM +0100, Jiaxun Yang wrote: > > > 在 2024/5/8 18:01, Conor Dooley 写道: > [...] > > > So it's actually a register block that can be remapped to anywhere in > > > MMIO address space. DeviceTree usually passes firmware's mapping location > > > to kernel. > > > > > > There are some other similar bindings like mti,mips-cdmm and mti,mips-cpc, > > > I just copied phraseology from them, should I try to explain it more here? > > The description that you've given here is of something that sounded > > awfully like mapping into a location in DDR etc, is it actually being > > mapped into a non-memory address? > It is an overlay being realized at CPU core level so it can be mapped at any > where, but the firmware convention is to map it to a "non-memory address". In that case, a description that even eejits like my can understand sounds like all you need to understand :) Thanks, Conor.
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