Document brcm,bmips-cbr-reg property.
Some SoC suffer from a BUG where read_c0_brcm_cbr() might return 0
if called from TP1. The CBR address is always the same on the SoC
hence it can be provided in DT to handle broken case where bootloader
doesn't init it or SMP where read_c0_brcm_cbr() returns 0 from TP1.
Usage of this property is to give an address also in these broken
configuration/bootloader.
Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
---
.../devicetree/bindings/mips/brcm/soc.yaml | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
index 975945ca2888..77f73ab48c11 100644
--- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml
+++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
@@ -55,6 +55,15 @@ properties:
under the "cpus" node.
$ref: /schemas/types.yaml#/definitions/uint32
+ brcm,bmips-cbr-reg:
+ description: Reference address of the CBR.
+ Some SoC suffer from a BUG where read_c0_brcm_cbr() might
+ return 0 if called from TP1. The CBR address is always the
+ same on the SoC hence it can be provided in DT to handle
+ broken case where bootloader doesn't initialise it or SMP
+ where read_c0_brcm_cbr() returns 0 from TP1.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
patternProperties:
"^cpu@[0-9]$":
type: object
@@ -64,6 +73,20 @@ properties:
required:
- mips-hpt-frequency
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - brcm,bcm6358
+ - brcm,bcm6368
+
+then:
+ properties:
+ cpus:
+ required:
+ - brcm,bmips-cbr-reg
+
additionalProperties: true
examples:
--
2.43.0
