Quoting Théo Lebrun (2024-04-11 03:14:09)
> Hello,
>
> On Thu Apr 11, 2024 at 5:06 AM CEST, Stephen Boyd wrote:
> > Quoting Théo Lebrun (2024-04-10 10:12:33)
> > > index 4a537260f655..cb348e502e41 100644
> > > --- a/include/linux/clk-provider.h
> > > +++ b/include/linux/clk-provider.h
> > > @@ -675,13 +675,15 @@ struct clk_div_table {
> > > * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are used
> > > * for the divider register. Setting this flag makes the register accesses
> > > * big endian.
> > > + * CLK_DIVIDER_EVEN_INTEGERS - clock divisor is 2, 4, 6, 8, 10, etc.
> > > + * Formula is 2 * (value read from hardware + 1).
> > > */
> > > struct clk_divider {
> > > struct clk_hw hw;
> > > void __iomem *reg;
> > > u8 shift;
> > > u8 width;
> > > - u8 flags;
> > > + u16 flags;
> >
> > This can stay u8
>
> It is unclear to me why it can stay u8? __clk_hw_register_divider() puts
> clk_divider_flags into flags field of struct clk_divider.
> BIT(8) overflows u8.
Oh, I missed that part.
>
> >
> > > const struct clk_div_table *table;
> > > spinlock_t *lock;
> > > };
> >
> > We should add a kunit test.
>
> Will look into how this works and try something for next revision. I
> guess you are talking about adding clk_divider tests, not only tests
> for this flag? I cannot find any existing kunit tests for clk_divider.
>
Right, there aren't any tests today. Thanks.
