It is one simple optimization in the interrupt dispatch function
eiointc_irq_dispatch. There are 256 IRQs supported for eiointc on
3A5000 and 2K2000 platform, 128 IRQS on 2K0500 platform, eiointc irq
handler reads the bitmap and find pending irqs when irq happens. So
there are several consecutive iocsr_read64 operations for the all
bits to find all pending irqs. If the pending bitmap is zero, it
means that there is no pending irq for the this irq bitmap range,
we can skip handling to avoid some useless operations such as
clearing hw ISR.
Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
---
drivers/irqchip/irq-loongson-eiointc.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
index b3736bdd4b9f..6a71a8c29ac7 100644
--- a/drivers/irqchip/irq-loongson-eiointc.c
+++ b/drivers/irqchip/irq-loongson-eiointc.c
@@ -198,6 +198,12 @@ static void eiointc_irq_dispatch(struct irq_desc *desc)
for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) {
pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3));
+
+ /* Skip handling if pending bitmap is zero */
+ if (!pending)
+ continue;
+
+ /* Clear the IRQs */
iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3));
while (pending) {
int bit = __ffs(pending);
--
2.39.3
