On 18/12/2023 18:16, Théo Lebrun wrote: > Add DT-Schema bindings for the EyeQ5 reset controller. > > Signed-off-by: Théo Lebrun <theo.lebrun@xxxxxxxxxxx> > --- > .../bindings/reset/mobileye,eyeq5-reset.yaml | 69 +++++++++++++++++++ > MAINTAINERS | 2 + > include/dt-bindings/reset/mobileye,eyeq5-reset.h | 80 ++++++++++++++++++++++ > 3 files changed, 151 insertions(+) > > diff --git a/Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml b/Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml > new file mode 100644 > index 000000000000..cab6a75ba59d > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/mobileye,eyeq5-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mobileye EyeQ5 reset controller > + > +description: > + The EyeQ5 reset driver handles three reset domains. It is custom to this > + platform, its registers live in a shared region called OLB. > + > +maintainers: > + - Grégory Clement <gregory.clement@xxxxxxxxxxx> > + - Théo Lebrun <theo.lebrun@xxxxxxxxxxx> > + - Vladimir Kondratiev <vladimir.kondratiev@xxxxxxxxxxxx> > + > +properties: > + $nodename: > + pattern: "^reset-controller$" > + description: > + We have no unique address, we rely on OLB. NAK, third time. > + > + compatible: > + const: mobileye,eyeq5-reset > + > + "#reset-cells": > + const: 2 > + description: > + The first cell is the domain (0 to 2 inclusive) and the second one is the > + reset index inside that domain. > + > + mobileye,olb: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + A phandle to the OLB syscon. This is a fallback to using the parent as > + syscon node. No, the same rationale as before. > + > +required: > + - compatible > + - "#reset-cells" > + > +additionalProperties: false > + > +examples: > + - | > + olb@e00000 { > + compatible = "mobileye,eyeq5-olb", "syscon", "simple-mfd"; No, the same rationale as before. > + reg = <0xe00000 0x400>; > + reg-io-width = <4>; > + > + reset-controller { > + compatible = "mobileye,eyeq5-reset"; > + #reset-cells = <2>; > + }; > + }; > + > + - | > + olb: olb@e00000 { > + compatible = "mobileye,eyeq5-olb", "syscon", "simple-mfd"; No, the same rationale as before. The hardware is either A or B, not both. > + reg = <0xe00000 0x400>; > + reg-io-width = <4>; > + }; > + > + reset-controller { > + compatible = "mobileye,eyeq5-reset"; > + #reset-cells = <2>; > + mobileye,olb = <&olb>; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 4a7bd6b40d74..9096a940b425 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -14553,9 +14553,11 @@ M: Théo Lebrun <theo.lebrun@xxxxxxxxxxx> > L: linux-mips@xxxxxxxxxxxxxxx > S: Maintained > F: Documentation/devicetree/bindings/mips/mobileye.yaml > +F: Documentation/devicetree/bindings/reset/mobileye,eyeq5-reset.yaml > F: arch/mips/boot/dts/mobileye/ > F: arch/mips/configs/generic/board-eyeq5.config > F: arch/mips/generic/board-epm5.its.S > +F: include/dt-bindings/reset/mobileye,eyeq5-reset.h > F: include/dt-bindings/soc/mobileye,eyeq5.h > > MODULE SUPPORT > diff --git a/include/dt-bindings/reset/mobileye,eyeq5-reset.h b/include/dt-bindings/reset/mobileye,eyeq5-reset.h > new file mode 100644 > index 000000000000..ce59fe5409ac > --- /dev/null > +++ b/include/dt-bindings/reset/mobileye,eyeq5-reset.h > @@ -0,0 +1,80 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (C) 2023 Mobileye Vision Technologies Ltd. > + */ > + > +#ifndef _DT_BINDINGS_RESET_MOBILEYE_EYEQ5_RESET_H > +#define _DT_BINDINGS_RESET_MOBILEYE_EYEQ5_RESET_H > + > +/* Domain 0 */ > + > +/* 0..2 are reserved */ No, they are not. IDs cannot be reserved. IDs start from 0 and are incremented by 1. Reserving an ID contradicts to entire point of that ID, so either drop entire file or make this proper IDs. > +#define EQ5R_D0_CAN0 3 > +#define EQ5R_D0_CAN1 4 > +#define EQ5R_D0_CAN2 5 > +#define EQ5R_D0_SPI0 6 > +#define EQ5R_D0_SPI1 7 > +#define EQ5R_D0_SPI2 8 > +#define EQ5R_D0_SPI3 9 ... > + > +#define EQ5R_D2_MULTIPHY_SWRST_DIS 12 > +#define EQ5R_D2_MULTIPHY_APB_RST_DIS 13 > +/* 14 is refclk select, ie not a reset */ > +#define EQ5R_D2_PCIE0_LINK_MGMT_RST 15 > +#define EQ5R_D2_PCIE1_LINK_MGMT_RST 16 > +#define EQ5R_D2_PCIE0_LINK_PM_RST 17 > +#define EQ5R_D2_PCIE1_LINK_PM_RST 18 > +/* 19..31 are unknown */ No, they are not unknown. They are explicitly implemented by driver or these are not IDs. Best regards, Krzysztof
