The AMD Delta and generic GPIO-based NAND drivers are using GPIO lines
extensively to communicate with a raw NAND flash.
Some confusion has crept into the naming leading to the two drivers using
inversed semantics differently for pins with the same name.
Fix the situation by naming the pins consistently without any inversion
names (such as nce for a negative active chip enable).
Fix up all in-tree users.
Next rewrite the device tree bindings in YAML schema, and fix up the
single in-tree DTS file (MIPS) to use the new bindings where each signal
is specified explicitly instead of an array with some "blanks" for unused
lines.
Last clean up the GPIO NAND driver to drop use of board file provided
data as no boards using this remain, and use device properties removing
the explicit reliance on device tree.
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
---
Linus Walleij (6):
mtd: rawnand: ams-delta/gpio: Unify polarity
dt-bindings: mtd: Rewrite gpio-control-nand in schema
MIPS: NI 169445: Fix NAND GPIOs
mtd: rawnand: gpio: Use device properties
mtd: rawnand: gpio: Support standard nand width
mtd: rawnand: gpio: Rename file
.../devicetree/bindings/mtd/gpio-control-nand.txt | 47 ------
.../devicetree/bindings/mtd/gpio-control-nand.yaml | 168 +++++++++++++++++++++
Documentation/devicetree/bindings/mtd/mtd.yaml | 2 +-
arch/arm/mach-omap1/board-ams-delta.c | 8 +-
arch/mips/boot/dts/ni/169445.dts | 13 +-
drivers/mtd/nand/raw/Makefile | 2 +-
drivers/mtd/nand/raw/ams-delta.c | 60 ++++----
drivers/mtd/nand/raw/{gpio.c => nand-gpio.c} | 120 +++++----------
8 files changed, 251 insertions(+), 169 deletions(-)
---
base-commit: be3ca57cfb777ad820c6659d52e60bbdd36bf5ff
change-id: 20231105-fix-mips-nand-c91ebd80fa4f
Best regards,
--
Linus Walleij <linus.walleij@xxxxxxxxxx>
