Re: [PATCH 01/11] MIPS: compressed: Use correct instruction for 64 bit code

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On 10/4/2023 9:10 AM, Gregory CLEMENT wrote:
The code clearing BSS already use macro or use correct instruction
depending id the CPU is 32 bits or 64 bits.


However, a few
instructions remained 32 bits only.

By using the accurate MACRO, it is now possible to deal with memory
address beyond 32 bits. As a side effect, when using 64bits processor,
it also divides the loop number needed to clear the BSS by 2.

Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx>

Reviewed-by: Florian Fainelli <florian.fainelli@xxxxxxxxxxxx>

  arch/mips/boot/compressed/head.S | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S
index 5795d0af1e1b..d237a834b85e 100644
--- a/arch/mips/boot/compressed/head.S
+++ b/arch/mips/boot/compressed/head.S
@@ -25,8 +25,8 @@
  	/* Clear BSS */
  	PTR_LA	a0, _edata
  	PTR_LA	a2, _end
-1:	sw	zero, 0(a0)
-	addiu	a0, a0, 4
+1:	PTR_S	zero, 0(a0)
  	bne	a2, a0, 1b
PTR_LA a0, (.heap) /* heap address */


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