Re: soft and hard float n32 and n64 binaries getting illegal instructions on Cobalt Qube2

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On 8/8/23 12:54, Maciej W. Rozycki wrote:
On Tue, 8 Aug 2023, Florian Fainelli wrote:

Now GDB tells me the faulting instruction is the following:

#0  0x77dcf190 in _dlstart_data () from target/lib/ld-musl-mipsn32el.so.1
#1  0x77e28bfc in ?? () from target/lib/ld-musl-mipsn32el.so.1
(gdb) display/i $pc
2: x/i $pc
=> 0x77dcf190 <_dlstart_data+17976>:    dclz    v1,a0

  So this is a MIPS64r1 instruction and Cobalt Qube2 is what, MIPS III?

It goes all the way through MIPS IV:

isa                     : mips1 mips2 mips3 mips4

It looks like you've got a broken binary that expects a higher ISA version
than what your hardware supports.  Assuming that you have built it with
the correct compilation options (which I take it is the case given that
your installation mostly works), you need to sort it out with the supplier
of your software.  Perhaps there's inline assembly there that has been
guarded incorrectly (though it shouldn't be necessary as GCC is itself
able to produce DCLZ where suitable).

It is my bad having assumed that the RM5231 CPU was MIPS64R1 capable and I completely forgot that it was not the case, thanks a lot for your help. I have now told GCC to build for -march=mips4 by default and it works properly.

I will in in that corner over there to hide ->
--
Florian




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