Hi Paul, > > I don't know why CPU_XBURST is also listed as both R1 and R2, the > > history > > looks convoluted with no explanation. Paul, is the CPU also dual- > > revision > > or is it just a bug and it is supposed to be listed under one ISA > > revision > > only, presumably R2? > > The XBurst CPU is R1 in older Ingenic SoCs (JZ4760B and older), and R2 > in newer SoCs (JZ4770 and newer). Great, thanks for confirming. So the current arrangement is right and still we don't want to dual-list the P5600 or M5150. Maciej
