On Fri, 19 May 2023, Jiaxun Yang wrote:
> MIPS_O32_FP64_SUPPORT enables possibility of using all 32 FPRs on 32bit
> kernel in case CPU implemented FR1. As FR1 is present on all 64bit CPUs
> following R4000's priviliged spec, there is no reason to limit such support
> to R2+ CPUs.
I guess one can do it and still run FPXX software, but I fail to see what
gain it provides. For FP32 it breaks things as accesses to odd-numbered
FPRs will no longer get at the high part of a double value and for FP64
there are no MTHC1/MFHC1 instructions required to access the high part.
What problem are you trying to solve? And how did you verify this patch?
> --- a/arch/mips/kernel/fpu-probe.c
> +++ b/arch/mips/kernel/fpu-probe.c
> @@ -289,6 +289,23 @@ void cpu_set_fpu_opts(struct cpuinfo_mips *c)
> c->options |= MIPS_CPU_FRE;
> }
>
> + /* Fix up FIR for FPU earlier than R2 */
> + if (!cpu_has_mips_r2_r6) {
> + c->fpu_id |= MIPS_FPIR_S;
> +#ifdef CONFIG_CPU_R4K_FPU
> + /* All known R4000 class FPU implemented double */
> + c->fpu_id |= MIPS_FPIR_D;
> +#endif
Currently all FPUs we support implement double and we require that, so no
need to make this piece conditional (I would use IS_ENABLED otherwise, so
as not to clutter the source with #ifdef), but `c->fpu_id' is also exposed
to the user via ptrace(2), so this has to reflect hardware and not give a
synthesized value.
Maciej
