On Wed, Feb 22, 2023 at 5:12 PM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote:
>
> For R4000 erratas around multiplication and division instructions,
> as our use of those instructions are always followed by mflo/mfhi
> instructions, the only issue we need care is
>
> "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0" Errata 28:
> "A double-word or a variable shift may give an incorrect result if
> executed while an integer multiplication is in progress."
>
> We just emit a mfhi $0 to ensure the operation is completed after
> every multiplication instruction accorading to workaround suggestion
> in the document.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
> ---
> arch/mips/Kconfig | 4 +---
> arch/mips/net/bpf_jit_comp32.c | 4 ++++
> arch/mips/net/bpf_jit_comp64.c | 3 +++
> 3 files changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index df0910e3895c..5ea07c833c5b 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -63,9 +63,7 @@ config MIPS
> select HAVE_DEBUG_STACKOVERFLOW
> select HAVE_DMA_CONTIGUOUS
> select HAVE_DYNAMIC_FTRACE
> - select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
> - !CPU_R4000_WORKAROUNDS && \
> - !CPU_R4400_WORKAROUNDS
Is the R4400 errata also covered by this workaround?
> + select HAVE_EBPF_JIT if !CPU_MICROMIPS
> select HAVE_EXIT_THREAD
> select HAVE_FAST_GUP
> select HAVE_FTRACE_MCOUNT_RECORD
> diff --git a/arch/mips/net/bpf_jit_comp32.c b/arch/mips/net/bpf_jit_comp32.c
> index ace5db3fbd17..fee334544d2f 100644
> --- a/arch/mips/net/bpf_jit_comp32.c
> +++ b/arch/mips/net/bpf_jit_comp32.c
> @@ -446,6 +446,9 @@ static void emit_mul_i64(struct jit_context *ctx, const u8 dst[], s32 imm)
> } else {
> emit(ctx, multu, hi(dst), src);
> emit(ctx, mflo, hi(dst));
> + /* Ensure multiplication is completed */
> + if (IS_ENABLED(CONFIG_CPU_R4000_WORKAROUNDS))
> + emit(ctx, mfhi, MIPS_R_ZERO);
> }
>
> /* hi(dst) = hi(dst) - lo(dst) */
> @@ -504,6 +507,7 @@ static void emit_mul_r64(struct jit_context *ctx,
> } else {
> emit(ctx, multu, lo(dst), lo(src));
> emit(ctx, mflo, lo(dst));
> + /* No need for workaround because we have this mfhi */
> emit(ctx, mfhi, tmp);
> }
R4000 is a 64-bit CPU, so the 32-bit JIT implementation will not be
used. From the Makefile:
ifeq ($(CONFIG_32BIT),y)
obj-$(CONFIG_BPF_JIT) += bpf_jit_comp32.o
else
obj-$(CONFIG_BPF_JIT) += bpf_jit_comp64.o
endif
>
> diff --git a/arch/mips/net/bpf_jit_comp64.c b/arch/mips/net/bpf_jit_comp64.c
> index 0e7c1bdcf914..5f5a93f997bc 100644
> --- a/arch/mips/net/bpf_jit_comp64.c
> +++ b/arch/mips/net/bpf_jit_comp64.c
> @@ -228,6 +228,9 @@ static void emit_alu_r64(struct jit_context *ctx, u8 dst, u8 src, u8 op)
> } else {
> emit(ctx, dmultu, dst, src);
> emit(ctx, mflo, dst);
> + /* Ensure multiplication is completed */
> + if (IS_ENABLED(CONFIG_CPU_R4000_WORKAROUNDS))
> + emit(ctx, mfhi, MIPS_R_ZERO);
> }
> break;
> /* dst = dst / src */
> --
> 2.37.1 (Apple Git-137.1)
>
