On Sat, Feb 11, 2023 at 11:50 AM <arinc9.unal@xxxxxxxxx> wrote:
>
> From: Arınç ÜNAL <arinc.unal@xxxxxxxxxx>
>
> On MT7621AT, MT7621DAT, and MT7621ST SoCs, port 5 of the MT7530 switch is
> connected to the second MAC of the SoC as a CPU port. Add the port and set
> up the second MAC on the bindings. Revert PHY muxing on GB-PC1.
>
> There's an external PHY connected to the second MAC of the SoC on GB-PC2,
> therefore, disable port@5 for this device.
>
> Signed-off-by: Arınç ÜNAL <arinc.unal@xxxxxxxxxx>
> ---
> .../boot/dts/ralink/mt7621-gnubee-gb-pc1.dts | 16 +++++-----------
> .../boot/dts/ralink/mt7621-gnubee-gb-pc2.dts | 9 ++++++++-
> arch/mips/boot/dts/ralink/mt7621.dtsi | 19 ++++++++++++++++++-
> 3 files changed, 31 insertions(+), 13 deletions(-)
Acked-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx>
Thanks,
Sergio Paracuellos
