Add Loongson Extended I/O Interrupt controller binding with DT schema format using json-schema. Signed-off-by: Binbin Zhou <zhoubinbin@xxxxxxxxxxx> --- .../loongson,eiointc.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml new file mode 100644 index 000000000000..88580297f955 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#"; +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; + +title: Loongson Extended I/O Interrupt Controller + +maintainers: + - Binbin Zhou <zhoubinbin@xxxxxxxxxxx> + +description: | + This interrupt controller is found on the Loongson-3 family chips and + Loongson-2K0500 chip and is used to distribute interrupts directly to + individual cores without forwarding them through the HT's interrupt line. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + enum: + - loongson,eiointc-1.0 + + reg: + minItems: 1 + maxItems: 3 + + interrupt-controller: true + + interrupts: + description: + Interrupt source of the CPU interrupts. + + interrupt-names: + description: + List of names for the parent interrupts. + items: + - const: int0 + + '#interrupt-cells': + const: 1 + + 'loongson,eio-num-vecs': + description: + The number of devices supported by the extended I/O interrupt vector. + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 1 + maximum: 256 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - 'loongson,eio-num-vecs' + +unevaluatedProperties: false + +examples: + - | + eiointc: interrupt-controller@1fe11600 { + compatible = "loongson,eiointc-1.0"; + reg = <0x1fe11600 0x8 + 0x1fe11700 0x8 + 0x1fe11800 0x8>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <3>; + interrupt-names = "int0"; + + loongson,eio-num-vecs = <128>; + + }; + +... -- 2.39.0
