On 12/8/22 10:09 AM, Rob Herring wrote: > On Mon, Nov 14, 2022 at 07:38:24PM +0800, Liu Peibao wrote: >> Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how >> the 14 IRQs are wired to the platform's internal interrupt controller by >> devicetree. >> >> Signed-off-by: Liu Peibao <liupeibao@xxxxxxxxxxx> >> --- >> .../loongarch,cpu-interrupt-controller.yaml | 34 +++++++++++++++++++ >> 1 file changed, 34 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> new file mode 100644 >> index 000000000000..2a1cf885c99d >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> @@ -0,0 +1,34 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: LoongArch CPU Interrupt Controller >> + >> +maintainers: >> + - Liu Peibao <liupeibao@xxxxxxxxxxx> >> + >> +properties: >> + compatible: >> + const: loongarch,cpu-interrupt-controller > > This doesn't match what the kernel is using. It has loongson rather than > loongarch. Please send an incremental fix. (Don't forget the example) > > Rob > I will send an incremental fix. It is much embarrassed for my careless. Thanks! BR, Peibao
