On 14/11/2022 12:38, Liu Peibao wrote: > Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how > the 14 IRQs are wired to the platform's internal interrupt controller by > devicetree. > > Signed-off-by: Liu Peibao <liupeibao@xxxxxxxxxxx> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
