Hi Stephen,
Le mar. 1 nov. 2022 à 12:22:14 -0700, Stephen Boyd <sboyd@xxxxxxxxxx>
a écrit :
Quoting Paul Cercueil (2022-10-28 00:48:35)
Hi Stephen,
Le jeu. 27 oct. 2022 � 14:57:14 -0700, Stephen Boyd
<sboyd@xxxxxxxxxx>
a �crit :
> Quoting Siarhei Volkau (2022-10-27 12:20:23)
>> diff --git a/drivers/clk/ingenic/jz4755-cgu.c
>> b/drivers/clk/ingenic/jz4755-cgu.c
>> new file mode 100644
>> index 000000000..d2eb3ae0c
>> --- /dev/null
>> +++ b/drivers/clk/ingenic/jz4755-cgu.c
>> @@ -0,0 +1,346 @@
> [...]
>> +static void __init jz4755_cgu_init(struct device_node *np)
>> +{
>> + int retval;
>> +
>> + cgu = ingenic_cgu_new(jz4755_cgu_clocks,
>> + ARRAY_SIZE(jz4755_cgu_clocks),
np);
>> + if (!cgu) {
>> + pr_err("%s: failed to initialise CGU\n",
__func__);
>> + return;
>> + }
>> +
>> + retval = ingenic_cgu_register_clocks(cgu);
>> + if (retval)
>> + pr_err("%s: failed to register CGU Clocks\n",
>> __func__);
>> +
>> + ingenic_cgu_register_syscore_ops(cgu);
>> +}
>> +CLK_OF_DECLARE_DRIVER(jz4755_cgu, "ingenic,jz4755-cgu",
>> jz4755_cgu_init);
>
> Is there another driver that probes this device?
> CLK_OF_DECLARE_DRIVER()
> is for the situation where we want to probe this device again with
> another platform driver. Please add a comment indicating what that
> other
> driver is.
See: 03d570e1a4dc ("clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro")
Does that mean this is also a simple-mfd?
Yes - there's the USB PHY registers randomly in the middle of the
clocks IP.
-Paul
