On Sun, Oct 09, 2022 at 09:13:32PM +0300, Siarhei Volkau wrote: > This will be used from the devicetree bindings to specify the clocks > that should be obtained from the jz4755-cgu driver. > > Signed-off-by: Siarhei Volkau <lis8215@xxxxxxxxx> > --- > .../dt-bindings/clock/ingenic,jz4755-cgu.h | 49 +++++++++++++++++++ > 1 file changed, 49 insertions(+) > create mode 100644 include/dt-bindings/clock/ingenic,jz4755-cgu.h > > diff --git a/include/dt-bindings/clock/ingenic,jz4755-cgu.h b/include/dt-bindings/clock/ingenic,jz4755-cgu.h > new file mode 100644 > index 000000000..32307f68c > --- /dev/null > +++ b/include/dt-bindings/clock/ingenic,jz4755-cgu.h > @@ -0,0 +1,49 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ Dual license please. > +/* > + * This header provides clock numbers for the ingenic,jz4755-cgu DT binding. > + */ > + > +#ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ > +#define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ > + > +#define JZ4755_CLK_EXT 0 > +#define JZ4755_CLK_OSC32K 1 > +#define JZ4755_CLK_PLL 2 > +#define JZ4755_CLK_PLL_HALF 3 > +#define JZ4755_CLK_EXT_HALF 4 > +#define JZ4755_CLK_CCLK 5 > +#define JZ4755_CLK_H0CLK 6 > +#define JZ4755_CLK_PCLK 7 > +#define JZ4755_CLK_MCLK 8 > +#define JZ4755_CLK_H1CLK 9 > +#define JZ4755_CLK_UDC 10 > +#define JZ4755_CLK_LCD 11 > +#define JZ4755_CLK_UART0 12 > +#define JZ4755_CLK_UART1 13 > +#define JZ4755_CLK_UART2 14 > +#define JZ4755_CLK_DMA 15 > +#define JZ4755_CLK_MMC 16 > +#define JZ4755_CLK_MMC0 17 > +#define JZ4755_CLK_MMC1 18 > +#define JZ4755_CLK_EXT512 19 > +#define JZ4755_CLK_RTC 20 > +#define JZ4755_CLK_UDC_PHY 21 > +#define JZ4755_CLK_I2S 22 > +#define JZ4755_CLK_SPI 23 > +#define JZ4755_CLK_AIC 24 > +#define JZ4755_CLK_ADC 25 > +#define JZ4755_CLK_TCU 26 > +#define JZ4755_CLK_BCH 27 > +#define JZ4755_CLK_I2C 28 > +#define JZ4755_CLK_TVE 29 > +#define JZ4755_CLK_CIM 30 > +#define JZ4755_CLK_AUX_CPU 31 > +#define JZ4755_CLK_AHB1 32 > +#define JZ4755_CLK_IDCT 33 > +#define JZ4755_CLK_DB 34 > +#define JZ4755_CLK_ME 35 > +#define JZ4755_CLK_MC 36 > +#define JZ4755_CLK_TSSI 37 > +#define JZ4755_CLK_IPU 38 > + > +#endif /* __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ */ > -- > 2.36.1 > >
