Quoting Serge Semin (2022-09-29 15:54:02)
> In accordance with the way the MIPS platform is normally design there are
> only six clock sources which need to be available on the kernel start in
> order to one end up booting correctly:
> + CPU PLL: needed by the r4k and MIPS GIC timer drivers. The former one is
> initialized by the arch code, while the later one is implemented in the
> mips-gic-timer.c driver as the OF-declared timer.
> + PCIe PLL: required as a parental clock source for the APB/timer domains.
> + APB clock: needed in order to access all the SoC CSRs at least for the
> timer OF-declared drivers.
> + APB Timer{0-2} clocks: these are the DW APB timers which drivers
> dw_apb_timer_of.c are implemented as the OF-declared timers.
>
> So as long as the clocks above are available early the kernel will
> normally work. Let's convert the Baikal-T1 CCU drivers to the platform
> device drivers keeping that in mind.
>
> Generally speaking the conversion isn't that complicated since the driver
> infrastructure has been designed as flexible enough for that. First we
> need to add a new PLL/Divider clock features flag which indicates the
> corresponding clock source as a basic one and that clock sources will be
> available on the kernel early boot stages. Second the internal PLL/Divider
> descriptors need to be initialized with -EPROBE_DEFER value as the
> corresponding clock source is unavailable at the early stages. They will
> be allocated and initialized on the Baikal-T1 clock platform driver probe
> procedure. Finally the already available PLL/Divider init functions need
> to be split up into two ones: init procedure performed in the framework of
> the OF-declared clock initialization (of_clk_init()), and the probe
> procedure called by the platform devices bus driver. Note the later method
> will just continue the system clocks initialization started in the former
> one.
>
> Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
>
> ---
Applied to clk-next
