Hello Keguang
On Thu, Aug 18, 2022 at 01:00:19PM +0800, Keguang Zhang wrote:
> From: Kelvin Cheung <keguang.zhang@xxxxxxxxx>
>
> The Ethernet of LS1B/LS1C doesn't work due to the stmmac driver
> using phylink_generic_validate() instead of stmmac_validate().
> Moreover the driver assumes the PHY interface mode
> passed in platform data is always supported.
>
> stmmaceth stmmaceth.0 eth0: validation of gmii with support 00000000,00000000,000062cf and advertisement 00000000,00000000,000062cf failed: -EINVAL
> stmmaceth stmmaceth.0 eth0: stmmac_open: Cannot attach to PHY (error: -22)
>
> This patch sets phy_interface field of platform data.
I've got a similar fix in my repo, though didn't have a chance to test
it out due to lacking any loongson hardware. I've discovered the
issues on my still going way of the STMMAC driver refactoring. Anyway
IMO the problem is a bit different than you describe and should be
fixed in a bit different way. Please see a patch attached to this
email. Could you test it out on your hw? If it fixes the problem you
can resend it as v2 patch.
-Sergey
>
> Fixes: 04a0683f7db4 ("net: stmmac: convert to phylink_generic_validate()")
> Fixes: d194923d51c9 ("net: stmmac: fill in supported_interfaces")
> Signed-off-by: Kelvin Cheung <keguang.zhang@xxxxxxxxx>
> ---
> arch/mips/loongson32/common/platform.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> index 794c96c2a4cd..741aace80b80 100644
> --- a/arch/mips/loongson32/common/platform.c
> +++ b/arch/mips/loongson32/common/platform.c
> @@ -147,8 +147,10 @@ static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> .phy_addr = -1,
> #if defined(CONFIG_LOONGSON1_LS1B)
> .interface = PHY_INTERFACE_MODE_MII,
> + .phy_interface = PHY_INTERFACE_MODE_MII,
> #elif defined(CONFIG_LOONGSON1_LS1C)
> .interface = PHY_INTERFACE_MODE_RMII,
> + .phy_interface = PHY_INTERFACE_MODE_RMII,
> #endif
> .mdio_bus_data = &ls1x_mdio_bus_data,
> .dma_cfg = &ls1x_eth_dma_cfg,
>
> base-commit: 568035b01cfb107af8d2e4bd2fb9aea22cf5b868
> --
> 2.34.1
>
>From 37a0bdea8d67ef28f55878b494ddcbaab632888c Mon Sep 17 00:00:00 2001
From: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
Date: Fri, 24 Sep 2021 17:33:19 +0300
Subject: [PATCH] MIPS: Loongson32: Fix PHY-mode being left unspecified
commit 0060c8783330 ("net: stmmac: implement support for passive mode
converters via dt") has changed the plat->interface field semantics from
containing the PHY-mode to specifying the MAC-PCS interface mode. Due to
that the loongson32 platform code will leave the phylink interface
uninitialized with the PHY-mode intended by the means of the actual
platform setup. The commit-author most likely has just missed the
arch-specific code to fix. Let's mend the Loongson32 platform code then by
assigning the PHY-mode to the phy_interface field of the STMMAC platform
data.
Fixes: 0060c8783330 ("net: stmmac: implement support for passive mode converters via dt")
Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
---
Note I don't have a Loongson32 hardware at hand to test it out. But the
bug in here seems to be more than probable. Thus I've taken a liberty to
post the fix. Should you not find a bug presented in there, just ignore
the patch.
---
arch/mips/loongson32/common/platform.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
index 794c96c2a4cd..311dc1580bbd 100644
--- a/arch/mips/loongson32/common/platform.c
+++ b/arch/mips/loongson32/common/platform.c
@@ -98,7 +98,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
if (plat_dat->bus_id) {
__raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
GMAC1_USE_UART0, LS1X_MUX_CTRL0);
- switch (plat_dat->interface) {
+ switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_RGMII:
val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
break;
@@ -107,12 +107,12 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
break;
default:
pr_err("unsupported mii mode %d\n",
- plat_dat->interface);
+ plat_dat->phy_interface);
return -ENOTSUPP;
}
val &= ~GMAC1_SHUT;
} else {
- switch (plat_dat->interface) {
+ switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_RGMII:
val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
break;
@@ -121,7 +121,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
break;
default:
pr_err("unsupported mii mode %d\n",
- plat_dat->interface);
+ plat_dat->phy_interface);
return -ENOTSUPP;
}
val &= ~GMAC0_SHUT;
@@ -131,7 +131,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
plat_dat = dev_get_platdata(&pdev->dev);
val &= ~PHY_INTF_SELI;
- if (plat_dat->interface == PHY_INTERFACE_MODE_RMII)
+ if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
val |= 0x4 << PHY_INTF_SELI_SHIFT;
__raw_writel(val, LS1X_MUX_CTRL1);
@@ -146,9 +146,9 @@ static struct plat_stmmacenet_data ls1x_eth0_pdata = {
.bus_id = 0,
.phy_addr = -1,
#if defined(CONFIG_LOONGSON1_LS1B)
- .interface = PHY_INTERFACE_MODE_MII,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
#elif defined(CONFIG_LOONGSON1_LS1C)
- .interface = PHY_INTERFACE_MODE_RMII,
+ .phy_interface = PHY_INTERFACE_MODE_RMII,
#endif
.mdio_bus_data = &ls1x_mdio_bus_data,
.dma_cfg = &ls1x_eth_dma_cfg,
@@ -186,7 +186,7 @@ struct platform_device ls1x_eth0_pdev = {
static struct plat_stmmacenet_data ls1x_eth1_pdata = {
.bus_id = 1,
.phy_addr = -1,
- .interface = PHY_INTERFACE_MODE_MII,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
.mdio_bus_data = &ls1x_mdio_bus_data,
.dma_cfg = &ls1x_eth_dma_cfg,
.has_gmac = 1,
--
2.35.1
