Re: [PATCH for-5.19 1/2] irqchip/loongson-liointc: Use architecture register to get coreid

Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> · Sat, 4 Jun 2022 14:46:30 +0100

在 2022/6/4 14:18, Huacai Chen 写道:
Hi, Jiaxun,

On Sat, Jun 4, 2022 at 8:41 PM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote:
fa84f89395e0 ("irqchip/loongson-liointc: Fix build error for
LoongArch") replaced get_ebase_cpunum with physical processor
id from SMP facilities. However that breaks MIPS non-SMP build
and makes booting from other cores inpossible on non-SMP kernel.

Thus we revert get_ebase_cpunum back and use get_csr_cpuid for
LoongArch.

Fixes: fa84f89395e0 ("irqchip/loongson-liointc: Fix build error for LoongArch")
Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
---
  drivers/irqchip/irq-loongson-liointc.c | 10 +++++++++-
  1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c
index aed88857d90f..c11cf97bcd1a 100644
--- a/drivers/irqchip/irq-loongson-liointc.c
+++ b/drivers/irqchip/irq-loongson-liointc.c
@@ -39,6 +39,14 @@

  #define LIOINTC_ERRATA_IRQ     10

+#if defined(CONFIG_MIPS)
+#define liointc_core_id get_ebase_cpunum()
+#elif defined(CONFIG_LOONGARCH)
+#define liointc_core_id get_csr_cpuid()
+#else
+#define liointc_core_id 0
+#endif
Thank you for your quick fix. But I think it is better to do like this:

#if defined(CONFIG_LOONGARCH)
#define liointc_core_id get_csr_cpuid()
#else
#define liointc_core_id get_ebase_cpunum()
#endif

Because this driver doesn't depend on COMPILE_TEST, it can only be
built under MIPS and LOONGARCH. Moreover, let the else branch be the
same as the old behavior looks more reasonable.
Thanks for the suggestion.
Will do for v2.

- Jiaxun


Huacai

+
  struct liointc_handler_data {
         struct liointc_priv     *priv;
         u32                     parent_int_map;
@@ -57,7 +65,7 @@ static void liointc_chained_handle_irq(struct irq_desc *desc)
         struct liointc_handler_data *handler = irq_desc_get_handler_data(desc);
         struct irq_chip *chip = irq_desc_get_chip(desc);
         struct irq_chip_generic *gc = handler->priv->gc;
-       int core = cpu_logical_map(smp_processor_id()) % LIOINTC_NUM_CORES;
+       int core = liointc_core_id % LIOINTC_NUM_CORES;
         u32 pending;

         chained_irq_enter(chip, desc);
--
2.25.1








