Re: [RESEND PATCH 2/3] clk: ingenic: Mark critical clocks in Ingenic SoCs

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On Thu, Apr 21, 2022 at 07:33:57PM -0700, Stephen Boyd wrote:
> Quoting Aidan MacDonald (2022-04-11 03:14:40)
> > Consider the CPU, L2 cache, and memory as critical to ensure they
> > are not disabled.
> > 
> > Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@xxxxxxxxx>
> > Reviewed-by: Paul Cercueil <paul@xxxxxxxxxxxxxxx>
> > ---
> 
> General comment, please add a comment around CLK_IS_CRITICAL usage if it
> isn't very clear why such a clk shouldn't be turned off. Second, is
> there any point in describing these clks in the kernel and using memory
> to do that if they're just going to always be on? Wouldn't a dummy clk
> returned from clk_get() work just as well if anything is grabbing a
> reference with clk_get()?

I'd guess they're there to keep track of which PLLs are in use, at least
for SoCs that have more than one PLL. Using a dummy clock sounds like a
bad idea since it won't represent that, and besides the clock configuration
is something that can change at runtime so hardcoding it would be foolish.

I'll send a v2 with explanatory comments around CLK_IS_CRITICAL.

Regards,
Aidan



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