On 1/23/2022 7:26 AM, Andrew Lunn wrote:
On Sun, Jan 23, 2022 at 11:33:04AM +0300, Arınç ÜNAL wrote:
Hey Deng,
On 23/01/2022 09:51, DENG Qingfang wrote:
Hi,
Do you set the ethernet pinmux correctly?
ðernet {
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
};
This fixed it! We did have &rgmii2_pins on the gmac1 node (it was originally
on external_phy) so we never thought to investigate the pinctrl
configuration further! Turns out &rgmii2_pins needs to be defined on the
ethernet node instead.
PHYs are generally external, so pinmux on them makes no sense. PHYs in
DT are not devices in the usual sense, so i don't think the driver
core will handle pinmux for them, even if you did list them.
Not sure I understand your comment here, this is configuring the pinmux
on the SoC side in order for the second RGMII interface's data path to work.
It is not uncommon for the same set of I/O pads to be used by different
functions within the chip. For instance the chips I work with happily
offer RGMII, MTSIF, PDM (I2S), TSIO on the same pads via different
pinmuxing options.
Also, this is declaring a pinmuxing function for the Ethernet MAC, which
is a perfectly valid use case and typically how pinmuxing is declared
for a given SoC.
--
Florian
