On Tue, 19 Oct 2021 at 03:32, Maciej W. Rozycki <macro@xxxxxxxxxxx> wrote: > > On Wed, 13 Oct 2021, Zhou Yanjie wrote: > > > > > can people, who provided performance numbers for v1 do the same for v2 ? > > > > > > > > > Sure, I will test the v2 in the next few days. > > > > > > Sorry for the delay, It took a lot of time to migrate the environment to my > > new computer, here is the results: > > > > > > Score Without Patches Score With Patches Performance Change SoC Model > > 105.9 102.1 -3.6% JZ4775 > > 132.4 124.1 -6.3% JZ4780(SMP off) > > 170.2 155.7 -8.5% JZ4780(SMP on) > > 101.3 91.5 -9.7% X1000E > > 187.1 179.4 -4.1% X1830 > > 324.9 314.3 -3.3% X2000(SMT off) > > 394.6 373.9 -5.2% X2000(SMT off) > > > > > > Compared with the V1 version, there are some improvements, but the performance > > loss is still a bit obvious > > The MIPS port of Linux has always had the pride of having a particularly > low syscall overhead and I'd rather we didn't lose this quality. Hi, Maciej, 1. The current trend is to use generic code, so I think this work is worth it, even if there is some performance loss. 2. We tested the performance on 5.15-rc1~rc5 and the performance loss on JZ4780 (SMP off) is not so obvious (about -3%). 3. Yanjie, is there any problem with the code base you tested? Could you help to test patch v3 on the latest mainline kernel? Thanks, Feiyang > > FWIW, > > Maciej
