On Mon, Aug 02, 2021 at 03:10:32PM +0200, Oleksij Rempel wrote: > In case of this switch we work with 32bit registers on top of 16bit > bus. Some registers (for example access to forwarding database) have > trigger bit on the first 16bit half of request and the result + > configuration of request in the second half. Without this patch, we would > trigger database operation and overwrite result in one run. > > To make it work properly, we should do the second part of transfer > before the first one is done. > > So far, this rule seems to work for all registers on this switch. > > Signed-off-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx> > Reviewed-by: Andrew Lunn <andrew@xxxxxxx> > --- Reviewed-by: Vladimir Oltean <olteanv@xxxxxxxxx>
