Hi, Earlier this year I noticed the CBUS UART, a discrete TI16C550C part wired directly to the system controller's device bus and supposed to come up as ttyS2 in addition to ttyS0 and ttyS1 ports from a Super I/O device behind the PCI southbridge, is not recognised with my MIPS Malta board booting big-endian. I got to the bottom of the problem now and as it turns out we have two long-standing bugs causing it, one in generic 8250 code and another in Malta platform code, and this has never worked in the big-endian mode. Here's v2 of the series, addressing minor issues with 1/2 pointed out in the review. Please apply. Maciej