On Wed, Jun 2, 2021 at 12:05 AM Stephen Boyd <sboyd@xxxxxxxxxx> wrote:
> Quoting Arnd Bergmann (2021-06-01 05:24:59)
> > On Tue, Jun 1, 2021 at 11:51 AM Thomas Bogendoerfer
> > <tsbogend@xxxxxxxxxxxxxxxx> wrote:
> > >
> > > On Mon, May 31, 2021 at 08:47:42PM +0200, Arnd Bergmann wrote:
> > > > As I noticed that the ar7 clock implementation and the ralink version
> > > > are rather trivial, I ended up converting those to use the common-clk
> > > > interfaces as well, though this is unrelated to the other changes.
> > >
> > > excellent, how is your plan for merging the series ?
> >
> > I have not decided yet. I think it would be best to keep the series together
> > and merge it through the clk maintainer tree, or possibly my asm-generic
> > tree, but as there is no rush, we could also do the mips and m68k bits
> > through the architecture trees, and defer the rest for 5.15.
> >
>
> I'm happy to take the series through clk tree if that helps.
Ok, great. I've addressed all the issues that were pointed out, but it
would be good to get an Acked-by or some testing for the MIPS
(ar7 and ralink) bits. Thomas and John, let me know if you find
something that needs to be addressed first, or if you are happy
me to send the latest version for merging.
Arnd
