On 4/22/21 7:26 AM, Maciej W. Rozycki wrote:
On Thu, 22 Apr 2021, kernel test robot wrote:fs/xfs/libxfs/xfs_alloc_btree.c: In function 'xfs_allocbt_free_block':arch/mips/include/asm/div64.h:74:3: error: inconsistent operand constraints in an 'asm'74 | __asm__("divu $0, %z1, %z2" \ | ^~~~~~~Umm, I forgot we do support MIPSr6, unlike microMIPSr6. I think this asm can go and GCC will do equally well with plain C code. Or actually marginally better, as preliminary benchmarking shows, owing to a slightly better instruction scheduling. Code produced for test_div64 is also slightly smaller for some reason. That's at least for the ISAs up to R5, which do have DIVU. Well, I can't complain. For R6 compiled code will work, but separate DIVU and MODU instructions will be produced, which are also interlocked, so scalar implementations will likely not perform as well as older ISAs with their asynchronous MD unit. Likely still faster then the generic algorithm though. Thomas: I'll collect new figures and respin the series. Please do drop the original series then; I think there's no point to fix it up and we'll be better by starting afresh. Ying: I take it you'll know what to do to get the bot updated. As it happens it uses the old <linux-mips@xxxxxxxxxxxxxx> MIPS/Linux mailing list address, which has been long deprecated and then stopped working altogether mid Jan this year. I have updated the cc appropriately with this reply, but would you please amend whatever the bot requires for further notices to be sent to <linux-mips@xxxxxxxxxxxxxxx> instead? Maciej
Hi Maciej, Thanks for the advice, we have updated the mailing list. Best Regards, Rong Chen
