On Sat, Apr 17, 2021 at 3:58 PM Matthew Wilcox <willy@xxxxxxxxxxxxx> wrote:
> I wouldn't like to make that assumption. I've come across IOMMUs (maybe
> on parisc? powerpc?) that like to encode fun information in the top
> few bits. So we could get it down to 52 bits, but I don't think we can
> get all the way down to 32 bits. Also, we need to keep the bottom bit
> clear for PageTail, so that further constrains us.
I'd be surprised to find such an IOMMU on a 32-bit machine, given that
the main reason for using an IOMMU on these is to avoid the 32-bit
address limit in DMA masters.
I see that parisc32 does not enable 64-bit dma_addr_t, while powerpc32
does not support any IOMMU, so it wouldn't be either of those two.
I do remember some powerpc systems that encode additional flags
(transaction ordering, caching, ...) into the high bits of the physical
address in the IOTLB, but not the virtual address used for looking
them up.
> Anyway, I like the "two unsigned longs" approach I posted yesterday,
> but thanks for the suggestion.
Ok, fair enough. As long as there are enough bits in this branch of
'struct page', I suppose it is the safe choice.
Arnd
