On Mon, 8 Mar 2021, Serge Semin wrote:
> > some of them are not R2 (SB1), others are. So best bet would be to
> > simply reserve the first 0x1000 bytes for every CPU and special handling
> > for the BMIPS case. Does this cover all cases ?
>
> I can't say for sure whether it will cover all the cases/platforms. I
> visually analysed all the
> board_{nmi_handler,ejtag_handler,ebase,cache_error}_setup callbacks
> implementation in MIPS arch to create the list above. Exception vectors or
> some other stuff can be setup in some other platform-specific manner. But at
> least reserving a memory below PAGE_SIZE would get the situation partly back
> to before the memory below the kernel stopped being reserved. Hopefully
> one page will be enough for the platforms, which relied on that rule. The
> rest or them sooner or later will manifest itself as it has happened with
> Broadcom.
I think reserving up to 64KiB might be a bit excessive on one hand while
having the size of the reservation depend on configured PAGE_SIZE could be
too unpredictable on the other. I think 4KiB is a good compromise and I'd
leave anything else for platform maintainers to sort out.
Maciej
