在 2021/3/2 下午11:30, Maciej W. Rozycki 写道:
On Tue, 2 Mar 2021, Jiaxun Yang wrote:
After spending days poking with AUIPC, I suddenly found we indeed have ALUIPC
instruction in MIPS R6, which will clear low 16bit of AUIPC result.
So the whole thing now looks easier, we can have R_MIPS_PC_PAGE and
R_MIPS_PC_OFST and avoid all mess we met in RISC-V.
A pcrel loading could be as simple as:
aluipc a0, %pcrel_page(sym)
addiu a0, %pcrel_ofst(sym)
Yes, it should work, but you'll have to 64KiB-align the module in the
static link.
You may not need a new relocation for the low part as it looks to me like
the semantics of plain LO16 fits (though its REL handling peculiarities
may indeed favour an entirely new "clean" relocation"), but it's a design
detail and the general principle seems right to me.
Let me take a look ;-)
I'm not sure though why you try to avoid composed relocations given we've
had them for 20+ years now. Relocations are just calculation operators
for expressions evaluated at link time rather than assembly or high-level
language compilation time. And just like we don't invent single operators
for complex combinations of `+', `&', `%', `<<', etc. and instead compose
the exiting ones in expressions used in various programming languages to
get the desired calculation, we don't need to do that for relocation and
we can just have a collection of simple relocation operators to choose
from and combine.
Well just because binutils code drives me crazy:-(
I tired very hard to understand those stuff but when I trying to modify them
I just got endless assert failure or other unreasonable errors :-/
Thanks.
- Jiaxun
Maciej
